[AVX512] Enabling bit logic lowering

[oota-llvm.git] / test / CodeGen / X86 / vec_uint_to_fp.ll

diff --git a/test/CodeGen/X86/vec_uint_to_fp.ll b/test/CodeGen/X86/vec_uint_to_fp.ll
index 607be9a8549463dbf96e5f1b44270eb8f1deb452..46cfcd9a9a12ab28fc1adc2920764e0c814f0027 100644 (file)
--- a/test/CodeGen/X86/vec_uint_to_fp.ll
+++ b/test/CodeGen/X86/vec_uint_to_fp.ll
@@ -154,3 +154,14 @@ define <8 x float> @test2(<8 x i32> %A) nounwind {
   %C = uitofp <8 x i32> %A to <8 x float>
   ret <8 x float> %C
 }
+
+define <4 x double> @test3(<4 x i32> %arg) {
+; CHECK-LABEL: test3:
+; This test used to crash because we were custom lowering it as if it was
+; a conversion between <4 x i32> and <4 x float>.
+; AVX: vcvtdq2pd
+; AVX2: vcvtdq2pd
+; CHECK: retq
+  %tmp = uitofp <4 x i32> %arg to <4 x double>
+  ret <4 x double> %tmp
+}