[AVX512] Enabling bit logic lowering

[oota-llvm.git] / test / CodeGen / X86 / 2010-01-07-UAMemFeature.ll

diff --git a/test/CodeGen/X86/2010-01-07-UAMemFeature.ll b/test/CodeGen/X86/2010-01-07-UAMemFeature.ll
index 29ee1316462078dbc58b71366d0d6270188c93d3..bb24adb41817d4bb7d47a4d496cbb984b2509e0d 100644 (file)
--- a/test/CodeGen/X86/2010-01-07-UAMemFeature.ll
+++ b/test/CodeGen/X86/2010-01-07-UAMemFeature.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mattr=vector-unaligned-mem -march=x86 < %s | FileCheck %s
+; RUN: llc -mcpu=yonah -mattr=vector-unaligned-mem -march=x86 < %s | FileCheck %s
 ; CHECK: addps (
 
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
@@ -6,6 +6,6 @@ target triple = "x86_64-unknown-linux-gnu"
 
 define <4 x float> @foo(<4 x float>* %P, <4 x float> %In) nounwind {
        %A = load <4 x float>* %P, align 4
-       %B = add <4 x float> %A, %In
+       %B = fadd <4 x float> %A, %In
        ret <4 x float> %B
 }