-; RUN: llc -march=mips64el -mcpu=mips64r1 < %s | FileCheck %s
+; RUN: llc -march=mips64el -mcpu=mips4 -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK -check-prefix=MIPS4 %s
+; RUN: llc -march=mips64el -mcpu=mips64 -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK -check-prefix=MIPS64 %s
+
+@gll0 = common global i64 0, align 8
+@gll1 = common global i64 0, align 8
define i64 @f0(i64 %a0, i64 %a1) nounwind readnone {
entry:
define i64 @f14(i64 %a, i64 %b) nounwind readnone {
entry:
-; CHECK: ddiv $zero
+; CHECK-LABEL: f14:
+; CHECK: ddiv $zero, ${{[0-9]+}}, $[[R0:[0-9]+]]
+; CHECK: teq $[[R0]], $zero, 7
; CHECK: mflo
- %div = sdiv i64 %a, %b
+ %0 = load i64* @gll0, align 8
+ %1 = load i64* @gll1, align 8
+ %div = sdiv i64 %0, %1
ret i64 %div
}
-define i64 @f15(i64 %a, i64 %b) nounwind readnone {
+define i64 @f15() nounwind readnone {
entry:
-; CHECK: ddivu $zero
+; CHECK-LABEL: f15:
+; CHECK: ddivu $zero, ${{[0-9]+}}, $[[R0:[0-9]+]]
+; CHECK: teq $[[R0]], $zero, 7
; CHECK: mflo
- %div = udiv i64 %a, %b
+ %0 = load i64* @gll0, align 8
+ %1 = load i64* @gll1, align 8
+ %div = udiv i64 %0, %1
ret i64 %div
}
define i64 @f16(i64 %a, i64 %b) nounwind readnone {
entry:
-; CHECK: ddiv $zero
+; CHECK-LABEL: f16:
+; CHECK: ddiv $zero, ${{[0-9]+}}, $[[R0:[0-9]+]]
+; CHECK: teq $[[R0]], $zero, 7
; CHECK: mfhi
%rem = srem i64 %a, %b
ret i64 %rem
define i64 @f17(i64 %a, i64 %b) nounwind readnone {
entry:
-; CHECK: ddivu $zero
+; CHECK-LABEL: f17:
+; CHECK: ddivu $zero, ${{[0-9]+}}, $[[R0:[0-9]+]]
+; CHECK: teq $[[R0]], $zero, 7
; CHECK: mfhi
%rem = urem i64 %a, %b
ret i64 %rem
}
-declare i64 @llvm.ctlz.i64(i64) nounwind readnone
+declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone
-; CHECK: dclz $2, $4
define i64 @f18(i64 %X) nounwind readnone {
entry:
- %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %X)
+; CHECK-LABEL: f18:
+
+; The MIPS4 version is too long to reasonably test. At least check we don't get dclz
+; MIPS4-NOT: dclz
+
+; MIPS64: dclz $2, $4
+ %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %X, i1 true)
ret i64 %tmp1
}
-; CHECK: dclo $2, $4
define i64 @f19(i64 %X) nounwind readnone {
entry:
+; CHECK-LABEL: f19:
+
+; The MIPS4 version is too long to reasonably test. At least check we don't get dclo
+; MIPS4-NOT: dclo
+
+; MIPS64: dclo $2, $4
%neg = xor i64 %X, -1
- %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %neg)
+ %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %neg, i1 true)
ret i64 %tmp1
}
+define i64 @f20(i64 %a, i64 %b) nounwind readnone {
+entry:
+; CHECK-LABEL: f20:
+; CHECK: nor
+ %or = or i64 %b, %a
+ %neg = xor i64 %or, -1
+ ret i64 %neg
+}