#define RT3261_BIAS_CUR1 0x12
#define RT3261_BIAS_CUR3 0x14
#define RT3261_CLSD_INT_REG1 0x1c
+#define RT3261_CHPUMP_INT_REG1 0x24 //bard 11-6
#define RT3261_MAMP_INT_REG2 0x37
#define RT3261_CHOP_DAC_ADC 0x3d
#define RT3261_MIXER_INT_REG 0x3f
#define RT3261_EQ_PST_VOL_SFT 0
/* General Control1 (0xfa) */
+#define RT3261_LOUT_DF_MASK (0x1 << 14)
#define RT3261_LOUT_DF 14
#define RT3261_M_MAMIX_L (0x1 << 13)
#define RT3261_M_MAMIX_R (0x1 << 12)
#define RT3261_HEADSET_DET BIT(1)
#define RT3261_HEADPHO_DET BIT(2)
-void codec_set_spk(bool on);
-
-int rt3261_headset_mic_detect(int jack_insert);
-
/* System Clock Source */
enum {
RT3261_SCLK_S_MCLK,
RT3261_DMIC2,
};
+enum {
+ RT3261_ASRC_DIS,
+ RT3261_ASRC_EN,
+};
+
struct rt3261_pll_code {
bool m_bp; /* Indicates bypass m code or not. */
int m_code;
};
struct rt3261_priv {
+ struct i2c_client *i2c;
struct snd_soc_codec *codec;
struct delayed_work patch_work;
int pll_out;
int dmic_en;
+ int asrc_en;
int dsp_sw; /* expected parameter setting */
bool dsp_play_pass;
bool dsp_rec_pass;
- unsigned int codec_en_gpio;
- int (*io_init)(int gpio, char *iomux_name, int iomux_mode);
+ int codec_en_gpio;
unsigned int modem_is_open;
+ unsigned int spk_num;
+ unsigned int modem_input_mode;
+ unsigned int lout_to_modem_mode;
+ unsigned int spk_amplify;
+ unsigned int playback_if1_data_control;
+ unsigned int playback_if2_data_control;
};
int rt3261_conn_mux_path(struct snd_soc_codec *codec,
char *widget_name, char *path_name);
+int rt3261_headset_mic_detect(int jack_insert);
+
#endif /* __RT3261_H__ */