static int azx_alloc_cmd_io(struct azx *chip)
{
/* single page (at least 4096 bytes) must suffice for both ringbuffes */
- return chip->ops->dma_alloc_pages(chip, SNDRV_DMA_TYPE_DEV,
- PAGE_SIZE, &chip->rb);
+ return chip->io_ops->dma_alloc_pages(azx_bus(chip), SNDRV_DMA_TYPE_DEV,
+ PAGE_SIZE, &chip->rb);
}
static void azx_init_cmd_io(struct azx *chip)
*/
/* send a command */
-static int azx_send_cmd(struct hda_bus *bus, unsigned int val)
+static int azx_send_cmd(struct hdac_bus *_bus, unsigned int val)
{
+ struct hda_bus *bus = to_hda_bus(_bus);
struct azx *chip = bus->private_data;
if (chip->disabled)
}
/* get a response */
-static int azx_get_response(struct hda_bus *bus, unsigned int addr,
+static int azx_get_response(struct hdac_bus *_bus, unsigned int addr,
unsigned int *res)
{
+ struct hda_bus *bus = to_hda_bus(_bus);
struct azx *chip = bus->private_data;
if (chip->disabled)
return 0;
return azx_rirb_get_response(bus, addr, res);
}
+static const struct hdac_bus_ops bus_core_ops = {
+ .command = azx_send_cmd,
+ .get_response = azx_get_response,
+};
+
#ifdef CONFIG_SND_HDA_DSP_LOADER
/*
* DSP loading code (e.g. for CA0132)
azx_dev->locked = 1;
spin_unlock_irq(&chip->reg_lock);
- err = chip->ops->dma_alloc_pages(chip, SNDRV_DMA_TYPE_DEV_SG,
- byte_size, bufp);
+ err = chip->io_ops->dma_alloc_pages(&bus->core, SNDRV_DMA_TYPE_DEV_SG,
+ byte_size, bufp);
if (err < 0)
goto err_alloc;
return azx_dev->stream_tag;
error:
- chip->ops->dma_free_pages(chip, bufp);
+ chip->io_ops->dma_free_pages(&bus->core, bufp);
err_alloc:
spin_lock_irq(&chip->reg_lock);
if (azx_dev->opened)
azx_dev->period_bytes = 0;
azx_dev->format_val = 0;
- chip->ops->dma_free_pages(chip, dmab);
+ chip->io_ops->dma_free_pages(&bus->core, dmab);
dmab->area = NULL;
spin_lock_irq(&chip->reg_lock);
for (i = 0; i < chip->num_streams; i++) {
dsp_lock_init(&chip->azx_dev[i]);
/* allocate memory for the BDL for each stream */
- err = chip->ops->dma_alloc_pages(chip, SNDRV_DMA_TYPE_DEV,
+ err = chip->io_ops->dma_alloc_pages(azx_bus(chip), SNDRV_DMA_TYPE_DEV,
BDL_SIZE,
&chip->azx_dev[i].bdl);
if (err < 0)
return -ENOMEM;
}
/* allocate memory for the position buffer */
- err = chip->ops->dma_alloc_pages(chip, SNDRV_DMA_TYPE_DEV,
+ err = chip->io_ops->dma_alloc_pages(azx_bus(chip), SNDRV_DMA_TYPE_DEV,
chip->num_streams * 8, &chip->posbuf);
if (err < 0)
return -ENOMEM;
if (chip->azx_dev) {
for (i = 0; i < chip->num_streams; i++)
if (chip->azx_dev[i].bdl.area)
- chip->ops->dma_free_pages(
- chip, &chip->azx_dev[i].bdl);
+ chip->io_ops->dma_free_pages(azx_bus(chip),
+ &chip->azx_dev[i].bdl);
}
if (chip->rb.area)
- chip->ops->dma_free_pages(chip, &chip->rb);
+ chip->io_ops->dma_free_pages(azx_bus(chip), &chip->rb);
if (chip->posbuf.area)
- chip->ops->dma_free_pages(chip, &chip->posbuf);
+ chip->io_ops->dma_free_pages(azx_bus(chip), &chip->posbuf);
}
EXPORT_SYMBOL_GPL(azx_free_stream_pages);
{
unsigned int cmd = (addr << 28) | (AC_NODE_ROOT << 20) |
(AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID;
+ struct hdac_bus *bus = &chip->bus->core;
int err;
unsigned int res;
- mutex_lock(&chip->bus->core.cmd_mutex);
+ mutex_lock(&bus->cmd_mutex);
chip->probing = 1;
- azx_send_cmd(chip->bus, cmd);
- err = azx_get_response(chip->bus, addr, &res);
+ azx_send_cmd(bus, cmd);
+ err = azx_get_response(bus, addr, &res);
chip->probing = 0;
- mutex_unlock(&chip->bus->core.cmd_mutex);
+ mutex_unlock(&bus->cmd_mutex);
if (err < 0 || res == -1)
return -EIO;
dev_dbg(chip->card->dev, "codec #%d probed OK\n", addr);
}
static struct hda_bus_ops bus_ops = {
- .command = azx_send_cmd,
- .get_response = azx_get_response,
.attach_pcm = azx_attach_pcm_stream,
.bus_reset = azx_bus_reset,
#ifdef CONFIG_SND_HDA_DSP_LOADER
struct hda_bus *bus;
int err;
- err = snd_hda_bus_new(chip->card, &bus);
+ err = snd_hda_bus_new(chip->card, &bus_core_ops, chip->io_ops, &bus);
if (err < 0)
return err;
return 0;
}
EXPORT_SYMBOL_GPL(azx_init_stream);
-
-MODULE_LICENSE("GPL");
-MODULE_DESCRIPTION("Common HDA driver functions");