.buffer_bytes_max = 64 * 4096,
.period_bytes_min = 4096,
.period_bytes_max = 4096,
- .periods_min = 4,
+ .periods_min = 6,
.periods_max = 64,
};
return PTR_ERR(pclk);
}
sample_clk = clk_get(&pdev->dev, "sample_clk");
- if (IS_ERR(pclk)) {
+ if (IS_ERR(sample_clk)) {
dev_dbg(&pdev->dev, "no sample clock\n");
- retval = PTR_ERR(pclk);
+ retval = PTR_ERR(sample_clk);
goto out_put_pclk;
}
clk_enable(pclk);
platform_set_drvdata(pdev, card);
dev_info(&pdev->dev, "Atmel ABDAC at 0x%p using %s\n",
- dac->regs, dac->dma.chan->dev->device.bus_id);
+ dac->regs, dev_name(&dac->dma.chan->dev->device));
return retval;