drm: bridge: dw-hdmi: set ddc scl clock rate according to dts

[firefly-linux-kernel-4.4.55.git] / mm / sparse-vmemmap.c

diff --git a/mm/sparse-vmemmap.c b/mm/sparse-vmemmap.c
index 27eeab3be757e8c9bf04a18dba9dfd7f7aaa5ab1..4cba9c2783a147077150505dcf6114cf4592843a 100644 (file)
--- a/mm/sparse-vmemmap.c
+++ b/mm/sparse-vmemmap.c
@@ -40,7 +40,8 @@ static void * __init_refok __earlyonly_bootmem_alloc(int node,
                                unsigned long align,
                                unsigned long goal)
 {
-       return __alloc_bootmem_node_high(NODE_DATA(node), size, align, goal);
+       return memblock_virt_alloc_try_nid(size, align, goal,
+                                           BOOTMEM_ALLOC_ACCESSIBLE, node);
 }
 
 static void *vmemmap_buf;
@@ -226,7 +227,8 @@ void __init sparse_mem_maps_populate_node(struct page **map_map,
 
        if (vmemmap_buf_start) {
                /* need to free left buf */
-               free_bootmem(__pa(vmemmap_buf), vmemmap_buf_end - vmemmap_buf);
+               memblock_free_early(__pa(vmemmap_buf),
+                                   vmemmap_buf_end - vmemmap_buf);
                vmemmap_buf = NULL;
                vmemmap_buf_end = NULL;
        }