Added the Advanced Encryption Standard (AES) Instructions.

[oota-llvm.git] / lib / Target / X86 / X86InstrSSE.td

diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td
index 720b663a6aa74725ecf209c28523c8209c4f06e9..372d522b6dcc712caedd7986c76fd6069e19c71d 100644 (file)
--- a/lib/Target/X86/X86InstrSSE.td
+++ b/lib/Target/X86/X86InstrSSE.td
@@ -69,6 +69,12 @@ def X86pcmpgtw : SDNode<"X86ISD::PCMPGTW", SDTIntBinOp>;
 def X86pcmpgtd : SDNode<"X86ISD::PCMPGTD", SDTIntBinOp>;
 def X86pcmpgtq : SDNode<"X86ISD::PCMPGTQ", SDTIntBinOp>;
 
+def X86aesimc          : SDNode<"X86ISD::AESIMC",          SDTIntBinOp>;
+def X86aesenc          : SDNode<"X86ISD::AESENC",          SDTIntBinOp>;
+def X86aesenclast      : SDNode<"X86ISD::AESENCLAST",      SDTIntBinOp>;
+def X86aesdec          : SDNode<"X86ISD::AESDEC",          SDTIntBinOp>;
+def X86aesdeclast      : SDNode<"X86ISD::AESDECLAST",      SDTIntBinOp>;
+
 def SDTX86CmpPTest : SDTypeProfile<0, 2, [SDTCisVT<0, v4f32>,
                                           SDTCisVT<1, v4f32>]>;
 def X86ptest   : SDNode<"X86ISD::PTEST", SDTX86CmpPTest>;
@@ -3817,6 +3823,45 @@ def : Pat<(v2i64 (X86pcmpgtq VR128:$src1, VR128:$src2)),
 def : Pat<(v2i64 (X86pcmpgtq VR128:$src1, (memop addr:$src2))),
           (PCMPGTQrm VR128:$src1, addr:$src2)>;
 
+defm AESIMC          : SS42I_binop_rm_int<0xDB, "aesimc",
+                       int_x86_sse42_aesimc>;
+defm AESENC          : SS42I_binop_rm_int<0xDC, "aesenc",
+                       int_x86_sse42_aesenc>;
+defm AESENCLAST      : SS42I_binop_rm_int<0xDD, "aesenclast",
+                       int_x86_sse42_aesenclast>;
+defm AESDEC          : SS42I_binop_rm_int<0xDE, "aesdec",
+                       int_x86_sse42_aesdec>;
+defm AESDECLAST      : SS42I_binop_rm_int<0xDF, "aesdeclast",
+                       int_x86_sse42_aesdeclast>;
+
+def : Pat<(v2i64 (X86aesimc VR128:$src1, VR128:$src2)),
+          (AESIMCrr VR128:$src1, VR128:$src2)>;
+def : Pat<(v2i64 (X86aesimc VR128:$src1, (memop addr:$src2))),
+          (AESIMCrm VR128:$src1, addr:$src2)>;
+def : Pat<(v2i64 (X86aesenc VR128:$src1, VR128:$src2)),
+          (AESENCrr VR128:$src1, VR128:$src2)>;
+def : Pat<(v2i64 (X86aesenc VR128:$src1, (memop addr:$src2))),
+          (AESENCrm VR128:$src1, addr:$src2)>;
+def : Pat<(v2i64 (X86aesenclast VR128:$src1, VR128:$src2)),
+          (AESENCLASTrr VR128:$src1, VR128:$src2)>;
+def : Pat<(v2i64 (X86aesenclast VR128:$src1, (memop addr:$src2))),
+          (AESENCLASTrm VR128:$src1, addr:$src2)>;
+def : Pat<(v2i64 (X86aesdec VR128:$src1, VR128:$src2)),
+          (AESDECrr VR128:$src1, VR128:$src2)>;
+def : Pat<(v2i64 (X86aesdec VR128:$src1, (memop addr:$src2))),
+          (AESDECrm VR128:$src1, addr:$src2)>;
+def : Pat<(v2i64 (X86aesdeclast VR128:$src1, VR128:$src2)),
+          (AESDECLASTrr VR128:$src1, VR128:$src2)>;
+def : Pat<(v2i64 (X86aesdeclast VR128:$src1, (memop addr:$src2))),
+          (AESDECLASTrm VR128:$src1, addr:$src2)>;
+
+def AESKEYGENASSIST128rr : SS42AI<0xDF, MRMSrcReg, (outs),
+  (ins VR128:$src1, VR128:$src2, i8imm:$src3),
+  "aeskeygenassist\t{$src3, $src2, $src1|$src1, $src2, $src3}", []>, OpSize;
+def AESKEYGENASSIST128rm : SS42AI<0xDF, MRMSrcMem, (outs),
+  (ins VR128:$src1, i128mem:$src2, i8imm:$src3),
+  "aeskeygenassist\t{$src3, $src2, $src1|$src1, $src2, $src3}", []>, OpSize;
+
 // crc intrinsic instruction
 // This set of instructions are only rm, the only difference is the size
 // of r and m.