// This file contains a printer that converts from our internal
// representation of machine-dependent LLVM code to Intel-format
// assembly language. This printer is the output mechanism used
-// by `llc' and `lli -printmachineinstrs' on X86.
+// by `llc' and `lli -print-machineinstrs' on X86.
//
//===----------------------------------------------------------------------===//
#include "X86.h"
#include "X86InstrInfo.h"
-#include "llvm/Module.h"
-#include "llvm/Type.h"
#include "llvm/Constants.h"
#include "llvm/DerivedTypes.h"
-#include "llvm/Target/TargetMachine.h"
+#include "llvm/Module.h"
+#include "llvm/Assembly/Writer.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/Assembly/Writer.h"
+#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/Mangler.h"
+#include "Support/Statistic.h"
#include "Support/StringExtras.h"
+#include "Support/CommandLine.h"
namespace {
+ Statistic<> EmittedInsts("asm-printer", "Number of machine instrs printed");
+
+ // FIXME: This should be automatically picked up by autoconf from the C
+ // frontend
+ cl::opt<bool> EmitCygwin("enable-cygwin-compatible-output", cl::Hidden,
+ cl::desc("Emit X86 assembly code suitable for consumption by cygwin"));
+
struct Printer : public MachineFunctionPass {
/// Output stream on which we're printing assembly code.
///
return "X86 Assembly Printer";
}
+ void checkImplUses (const TargetInstrDescriptor &Desc);
void printMachineInstruction(const MachineInstr *MI);
void printOp(const MachineOperand &MO,
bool elideOffsetKeyword = false);
std::string valToExprString(const Value* V);
bool doInitialization(Module &M);
bool doFinalization(Module &M);
- void printConstantValueOnly(const Constant* CV, int numPadBytesAfter = 0);
+ void printConstantValueOnly(const Constant* CV);
void printSingleConstantValue(const Constant* CV);
};
} // end of anonymous namespace
/// using the given target machine description. This should work
/// regardless of whether the function is in SSA form.
///
-Pass *createX86CodePrinterPass(std::ostream &o, TargetMachine &tm) {
+FunctionPass *createX86CodePrinterPass(std::ostream &o,TargetMachine &tm){
return new Printer(o, tm);
}
/// and return this as a string.
///
std::string Printer::ConstantExprToString(const ConstantExpr* CE) {
- std::string S;
const TargetData &TD = TM.getTargetData();
switch(CE->getOpcode()) {
case Instruction::GetElementPtr:
{ // generate a symbolic expression for the byte address
const Value* ptrVal = CE->getOperand(0);
std::vector<Value*> idxVec(CE->op_begin()+1, CE->op_end());
- S += "(" + valToExprString(ptrVal) + ") + ("
- + utostr(TD.getIndexedOffset(ptrVal->getType(),idxVec)) + ")";
- break;
+ if (unsigned Offset = TD.getIndexedOffset(ptrVal->getType(), idxVec))
+ return "(" + valToExprString(ptrVal) + ") + " + utostr(Offset);
+ else
+ return valToExprString(ptrVal);
}
case Instruction::Cast:
|| (isa<PointerType>(Ty)
&& (OpTy == Type::LongTy || OpTy == Type::ULongTy)))
|| (((TD.getTypeSize(Ty) >= TD.getTypeSize(OpTy))
- && (OpTy-> isLosslesslyConvertibleTo(Ty))))
+ && (OpTy->isLosslesslyConvertibleTo(Ty))))
&& "FIXME: Don't yet support this kind of constant cast expr");
- S += "(" + valToExprString(Op) + ")";
+ return "(" + valToExprString(Op) + ")";
}
- break;
case Instruction::Add:
- S += "(" + valToExprString(CE->getOperand(0)) + ") + ("
- + valToExprString(CE->getOperand(1)) + ")";
- break;
+ return "(" + valToExprString(CE->getOperand(0)) + ") + ("
+ + valToExprString(CE->getOperand(1)) + ")";
default:
assert(0 && "Unsupported operator in ConstantExprToString()");
- break;
+ return "";
}
-
- return S;
}
/// printSingleConstantValue - Print a single constant value.
Result += C;
} else {
switch(C) {
- case '\a': Result += "\\a"; break;
case '\b': Result += "\\b"; break;
case '\f': Result += "\\f"; break;
case '\n': Result += "\\n"; break;
case '\r': Result += "\\r"; break;
case '\t': Result += "\\t"; break;
- case '\v': Result += "\\v"; break;
default:
Result += '\\';
Result += toOctal(C >> 6);
// Print a constant value or values (it may be an aggregate).
// Uses printSingleConstantValue() to print each individual value.
-void
-Printer::printConstantValueOnly(const Constant* CV,
- int numPadBytesAfter /* = 0 */)
-{
- const ConstantArray *CVA = dyn_cast<ConstantArray>(CV);
+void Printer::printConstantValueOnly(const Constant *CV) {
const TargetData &TD = TM.getTargetData();
- if (CVA && isStringCompatible(CVA))
- { // print the string alone and return
- O << "\t.string\t" << getAsCString(CVA) << "\n";
- }
- else if (CVA)
- { // Not a string. Print the values in successive locations
+ if (CV->isNullValue()) {
+ O << "\t.zero\t " << TD.getTypeSize(CV->getType()) << "\n";
+ } else if (const ConstantArray *CVA = dyn_cast<ConstantArray>(CV)) {
+ if (isStringCompatible(CVA)) {
+ // print the string alone and return
+ O << "\t.ascii\t" << getAsCString(CVA) << "\n";
+ } else { // Not a string. Print the values in successive locations
const std::vector<Use> &constValues = CVA->getValues();
for (unsigned i=0; i < constValues.size(); i++)
printConstantValueOnly(cast<Constant>(constValues[i].get()));
}
- else if (const ConstantStruct *CVS = dyn_cast<ConstantStruct>(CV))
- { // Print the fields in successive locations. Pad to align if needed!
- const StructLayout *cvsLayout =
- TD.getStructLayout(CVS->getType());
- const std::vector<Use>& constValues = CVS->getValues();
- unsigned sizeSoFar = 0;
- for (unsigned i=0, N = constValues.size(); i < N; i++)
- {
- const Constant* field = cast<Constant>(constValues[i].get());
-
- // Check if padding is needed and insert one or more 0s.
- unsigned fieldSize = TD.getTypeSize(field->getType());
- int padSize = ((i == N-1? cvsLayout->StructSize
- : cvsLayout->MemberOffsets[i+1])
- - cvsLayout->MemberOffsets[i]) - fieldSize;
- sizeSoFar += (fieldSize + padSize);
-
- // Now print the actual field value
- printConstantValueOnly(field, padSize);
- }
- assert(sizeSoFar == cvsLayout->StructSize &&
- "Layout of constant struct may be incorrect!");
+ } else if (const ConstantStruct *CVS = dyn_cast<ConstantStruct>(CV)) {
+ // Print the fields in successive locations. Pad to align if needed!
+ const StructLayout *cvsLayout = TD.getStructLayout(CVS->getType());
+ const std::vector<Use>& constValues = CVS->getValues();
+ unsigned sizeSoFar = 0;
+ for (unsigned i=0, N = constValues.size(); i < N; i++) {
+ const Constant* field = cast<Constant>(constValues[i].get());
+
+ // Check if padding is needed and insert one or more 0s.
+ unsigned fieldSize = TD.getTypeSize(field->getType());
+ unsigned padSize = ((i == N-1? cvsLayout->StructSize
+ : cvsLayout->MemberOffsets[i+1])
+ - cvsLayout->MemberOffsets[i]) - fieldSize;
+ sizeSoFar += fieldSize + padSize;
+
+ // Now print the actual field value
+ printConstantValueOnly(field);
+
+ // Insert the field padding unless it's zero bytes...
+ if (padSize)
+ O << "\t.zero\t " << padSize << "\n";
}
- else
+ assert(sizeSoFar == cvsLayout->StructSize &&
+ "Layout of constant struct may be incorrect!");
+ } else
printSingleConstantValue(CV);
-
- if (numPadBytesAfter) O << "\t.zero\t " << numPadBytesAfter << "\n";
}
/// printConstantPool - Print to the current output stream assembly
O << "\t.text\n";
O << "\t.align 16\n";
O << "\t.globl\t" << CurrentFnName << "\n";
- O << "\t.type\t" << CurrentFnName << ", @function\n";
+ if (!EmitCygwin)
+ O << "\t.type\t" << CurrentFnName << ", @function\n";
O << CurrentFnName << ":\n";
// Number each basic block so that we can consistently refer to them
MI->getOperand(Op+2).isRegister() &&MI->getOperand(Op+3).isImmediate();
}
+
+
void Printer::printOp(const MachineOperand &MO,
bool elideOffsetKeyword /* = false */) {
const MRegisterInfo &RI = *TM.getRegisterInfo();
// FALLTHROUGH
case MachineOperand::MO_MachineRegister:
if (MO.getReg() < MRegisterInfo::FirstVirtualRegister)
- O << RI.get(MO.getReg()).Name;
+ // Bug Workaround: See note in Printer::doInitialization about %.
+ O << "%" << RI.get(MO.getReg()).Name;
else
O << "%reg" << MO.getReg();
return;
case MachineOperand::MO_UnextendedImmed:
O << (int)MO.getImmedValue();
return;
- case MachineOperand::MO_PCRelativeDisp:
- {
- ValueMapTy::const_iterator i = NumberForBB.find(MO.getVRegValue());
- assert (i != NumberForBB.end()
- && "Could not find a BB I previously put in the NumberForBB map!");
- O << ".LBB" << i->second << " # PC rel: " << MO.getVRegValue()->getName();
- }
+ case MachineOperand::MO_PCRelativeDisp: {
+ ValueMapTy::const_iterator i = NumberForBB.find(MO.getVRegValue());
+ assert (i != NumberForBB.end()
+ && "Could not find a BB in the NumberForBB map!");
+ O << ".LBB" << i->second << " # PC rel: " << MO.getVRegValue()->getName();
return;
+ }
case MachineOperand::MO_GlobalAddress:
if (!elideOffsetKeyword)
O << "OFFSET ";
}
void Printer::printMemReference(const MachineInstr *MI, unsigned Op) {
- const MRegisterInfo &RI = *TM.getRegisterInfo();
assert(isMem(MI, Op) && "Invalid memory reference!");
if (MI->getOperand(Op).isFrameIndex()) {
O << "]";
}
+/// checkImplUses - Emit the implicit-use registers for the
+/// instruction described by DESC, if its PrintImplUses flag is set.
+///
+void Printer::checkImplUses (const TargetInstrDescriptor &Desc) {
+ const MRegisterInfo &RI = *TM.getRegisterInfo();
+ if (Desc.TSFlags & X86II::PrintImplUses) {
+ for (const unsigned *p = Desc.ImplicitUses; *p; ++p) {
+ // Bug Workaround: See note in Printer::doInitialization about %.
+ O << ", %" << RI.get(*p).Name;
+ }
+ }
+}
+
/// printMachineInstruction -- Print out a single X86 LLVM instruction
/// MI in Intel syntax to the current output stream.
///
unsigned Opcode = MI->getOpcode();
const TargetInstrInfo &TII = TM.getInstrInfo();
const TargetInstrDescriptor &Desc = TII.get(Opcode);
- const MRegisterInfo &RI = *TM.getRegisterInfo();
+ ++EmittedInsts;
switch (Desc.TSFlags & X86II::FormMask) {
case X86II::Pseudo:
// Print pseudo-instructions as comments; either they should have been
O << ", ";
printOp(MI->getOperand(1));
}
- if (Desc.TSFlags & X86II::PrintImplUses) {
- for (const unsigned *p = Desc.ImplicitUses; *p; ++p) {
- O << ", " << RI.get(*p).Name;
- }
- }
+ checkImplUses(Desc);
O << "\n";
return;
}
}
case X86II::MRMSrcReg: {
- // There is a two forms that are acceptable for MRMSrcReg instructions,
+ // There is are three forms that are acceptable for MRMSrcReg instructions,
// those with 3 and 2 operands:
//
// 3 Operands: in this form, the last register (the second input) is the
// ModR/M input. The first two operands should be the same, post register
// allocation. This is for things like: add r32, r/m32
//
+ // 3 Operands: in this form, we can have 'INST R, R, imm', which is used for
+ // instructions like the IMULri instructions.
+ //
// 2 Operands: this is for things like mov that do not read a second input
//
assert(MI->getOperand(0).isRegister() &&
MI->getOperand(1).isRegister() &&
(MI->getNumOperands() == 2 ||
- (MI->getNumOperands() == 3 && MI->getOperand(2).isRegister()))
+ (MI->getNumOperands() == 3 &&
+ (MI->getOperand(2).isRegister() ||
+ MI->getOperand(2).isImmediate())))
&& "Bad format for MRMSrcReg!");
if (MI->getNumOperands() == 3 &&
MI->getOperand(0).getReg() != MI->getOperand(1).getReg())
O << TII.getName(MI->getOpCode()) << " ";
printOp(MI->getOperand(0));
+
+ // If this is IMULri* instructions, print the non-two-address operand.
+ if (MI->getNumOperands() == 3 && MI->getOperand(2).isImmediate()) {
+ O << ", ";
+ printOp(MI->getOperand(1));
+ }
+
O << ", ";
printOp(MI->getOperand(MI->getNumOperands()-1));
O << "\n";
O << ", ";
printOp(MI->getOperand(MI->getNumOperands()-1));
}
- if (Desc.TSFlags & X86II::PrintImplUses) {
- for (const unsigned *p = Desc.ImplicitUses; *p; ++p) {
- O << ", " << RI.get(*p).Name;
- }
- }
+ checkImplUses(Desc);
O << "\n";
return;
}
}
-bool Printer::doInitialization(Module &M)
-{
- // Tell gas we are outputting Intel syntax (not AT&T syntax) assembly,
- // with no % decorations on register names.
- O << "\t.intel_syntax noprefix\n";
- Mang = new Mangler(M);
+bool Printer::doInitialization(Module &M) {
+ // Tell gas we are outputting Intel syntax (not AT&T syntax) assembly.
+ //
+ // Bug: gas in `intel_syntax noprefix' mode interprets the symbol `Sp' in an
+ // instruction as a reference to the register named sp, and if you try to
+ // reference a symbol `Sp' (e.g. `mov ECX, OFFSET Sp') then it gets lowercased
+ // before being looked up in the symbol table. This creates spurious
+ // `undefined symbol' errors when linking. Workaround: Do not use `noprefix'
+ // mode, and decorate all register names with percent signs.
+ O << "\t.intel_syntax\n";
+ Mang = new Mangler(M, EmitCygwin);
return false; // success
}
-static const Function *isConstantFunctionPointerRef(const Constant *C) {
- if (const ConstantPointerRef *R = dyn_cast<ConstantPointerRef>(C))
- if (const Function *F = dyn_cast<Function>(R->getValue()))
- return F;
- return 0;
+// SwitchSection - Switch to the specified section of the executable if we are
+// not already in it!
+//
+static void SwitchSection(std::ostream &OS, std::string &CurSection,
+ const char *NewSection) {
+ if (CurSection != NewSection) {
+ CurSection = NewSection;
+ if (!CurSection.empty())
+ OS << "\t" << NewSection << "\n";
+ }
}
-bool Printer::doFinalization(Module &M)
-{
+bool Printer::doFinalization(Module &M) {
const TargetData &TD = TM.getTargetData();
+ std::string CurSection;
+
// Print out module-level global variables here.
- for (Module::const_giterator I = M.gbegin(), E = M.gend(); I != E; ++I) {
- std::string name(Mang->getValueName(I));
- if (I->hasInitializer()) {
+ for (Module::const_giterator I = M.gbegin(), E = M.gend(); I != E; ++I)
+ if (I->hasInitializer()) { // External global require no code
+ O << "\n\n";
+ std::string name = Mang->getValueName(I);
Constant *C = I->getInitializer();
- if (C->isNullValue()) {
- O << "\n\n\t.comm " << name << "," << TD.getTypeSize(C->getType())
+ unsigned Size = TD.getTypeSize(C->getType());
+ unsigned Align = TD.getTypeAlignment(C->getType());
+
+ if (C->isNullValue() &&
+ (I->hasLinkOnceLinkage() || I->hasInternalLinkage() ||
+ I->hasWeakLinkage() /* FIXME: Verify correct */)) {
+ SwitchSection(O, CurSection, ".data");
+ if (I->hasInternalLinkage())
+ O << "\t.local " << name << "\n";
+
+ O << "\t.comm " << name << "," << TD.getTypeSize(C->getType())
<< "," << (unsigned)TD.getTypeAlignment(C->getType());
O << "\t\t# ";
WriteAsOperand(O, I, true, true, &M);
O << "\n";
} else {
- O << "\n\n\t.data\n";
- O << "\t.globl " << name << "\n";
+ switch (I->getLinkage()) {
+ case GlobalValue::LinkOnceLinkage:
+ case GlobalValue::WeakLinkage: // FIXME: Verify correct for weak.
+ // Nonnull linkonce -> weak
+ O << "\t.weak " << name << "\n";
+ SwitchSection(O, CurSection, "");
+ O << "\t.section\t.llvm.linkonce.d." << name << ",\"aw\",@progbits\n";
+ break;
+
+ case GlobalValue::AppendingLinkage:
+ // FIXME: appending linkage variables should go into a section of
+ // their name or something. For now, just emit them as external.
+ case GlobalValue::ExternalLinkage:
+ // If external or appending, declare as a global symbol
+ O << "\t.globl " << name << "\n";
+ // FALL THROUGH
+ case GlobalValue::InternalLinkage:
+ if (C->isNullValue())
+ SwitchSection(O, CurSection, ".bss");
+ else
+ SwitchSection(O, CurSection, ".data");
+ break;
+ }
+
+ O << "\t.align " << Align << "\n";
O << "\t.type " << name << ",@object\n";
- O << "\t.size " << name << "," << TD.getTypeSize(C->getType()) << "\n";
- O << "\t.align " << (unsigned)TD.getTypeAlignment(C->getType()) << "\n";
+ O << "\t.size " << name << "," << Size << "\n";
O << name << ":\t\t\t\t# ";
WriteAsOperand(O, I, true, true, &M);
O << " = ";
O << "\n";
printConstantValueOnly(C);
}
- } else {
- O << "\t.globl " << name << "\n";
- O << "\t.comm " << name << ", "
- << (unsigned)TD.getTypeSize(I->getType()) << ", "
- << (unsigned)TD.getTypeAlignment(I->getType()) << "\n";
}
- }
+
delete Mang;
return false; // success
}