def : POW_Common <LOG_IEEE_eg, EXP_IEEE_eg, MUL>;
def : Pat<(fsqrt f32:$src), (MUL $src, (RECIPSQRT_CLAMPED_eg $src))>;
-def : IMad24ExpandPat<MULLO_INT_eg, ADD_INT>;
-def : UMad24ExpandPat<MULLO_UINT_eg, ADD_INT>;
+defm : Expand24IBitOps<MULLO_INT_eg, ADD_INT>;
//===----------------------------------------------------------------------===//
// Memory read/write instructions
def : Pat<(i32 (sext_inreg i32:$src, i16)),
(BFE_INT_eg i32:$src, (i32 ZERO), (MOV_IMM_I32 16))>;
-defm : BFIPatterns <BFI_INT_eg>;
+defm : BFIPatterns <BFI_INT_eg, MOV_IMM_I32>;
def BFM_INT_eg : R600_2OP <0xA0, "BFM_INT",
[(set i32:$dst, (AMDGPUbfm i32:$src0, i32:$src1))],