FBI->HasCalls = true;
// Count processor resources used.
+ if (!SchedModel.hasInstrSchedModel())
+ continue;
const MCSchedClassDesc *SC = SchedModel.resolveSchedClass(MI);
if (!SC->isValid())
continue;
assert(BlockInfo[MBBNum].hasResources() &&
"getResources() must be called before getProcResourceCycles()");
unsigned PRKinds = SchedModel.getNumProcResourceKinds();
- return ArrayRef<unsigned>(&ProcResourceCycles[MBBNum * PRKinds], PRKinds);
+ assert((MBBNum+1) * PRKinds <= ProcResourceCycles.size());
+ return ArrayRef<unsigned>(ProcResourceCycles.data() + MBBNum * PRKinds,
+ PRKinds);
}
MachineTraceMetrics::Ensemble::
getProcResourceDepths(unsigned MBBNum) const {
unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds();
- return ArrayRef<unsigned>(&ProcResourceDepths[MBBNum * PRKinds], PRKinds);
+ assert((MBBNum+1) * PRKinds <= ProcResourceDepths.size());
+ return ArrayRef<unsigned>(ProcResourceDepths.data() + MBBNum * PRKinds,
+ PRKinds);
}
/// Get an array of processor resource heights for MBB. Indexed by processor
MachineTraceMetrics::Ensemble::
getProcResourceHeights(unsigned MBBNum) const {
unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds();
- return ArrayRef<unsigned>(&ProcResourceHeights[MBBNum * PRKinds], PRKinds);
+ assert((MBBNum+1) * PRKinds <= ProcResourceHeights.size());
+ return ArrayRef<unsigned>(ProcResourceHeights.data() + MBBNum * PRKinds,
+ PRKinds);
}
//===----------------------------------------------------------------------===//
// Add latency if DefMI is a real instruction. Transients get latency 0.
if (!Dep.DefMI->isTransient())
DepCycle += MTM.SchedModel
- .computeOperandLatency(Dep.DefMI, Dep.DefOp, UseMI, Dep.UseOp,
- /* FindMin = */ false);
+ .computeOperandLatency(Dep.DefMI, Dep.DefOp, UseMI, Dep.UseOp);
Cycle = std::max(Cycle, DepCycle);
}
// Remember the instruction depth.
// We may not know the UseMI of this dependency, if it came from the
// live-in list. SchedModel can handle a NULL UseMI.
DepHeight += SchedModel
- .computeOperandLatency(MI, MO.getOperandNo(), I->MI, I->Op,
- /* FindMin = */ false);
+ .computeOperandLatency(MI, MO.getOperandNo(), I->MI, I->Op);
}
Height = std::max(Height, DepHeight);
// This regunit is dead above MI.
// Adjust height by Dep.DefMI latency.
if (!Dep.DefMI->isTransient())
UseHeight += SchedModel.computeOperandLatency(Dep.DefMI, Dep.DefOp,
- UseMI, Dep.UseOp, false);
+ UseMI, Dep.UseOp);
// Update Heights[DefMI] to be the maximum height seen.
MIHeightMap::iterator I;
// Add latency if DefMI is a real instruction. Transients get latency 0.
if (!Dep.DefMI->isTransient())
DepCycle += TE.MTM.SchedModel
- .computeOperandLatency(Dep.DefMI, Dep.DefOp, PHI, Dep.UseOp, false);
+ .computeOperandLatency(Dep.DefMI, Dep.DefOp, PHI, Dep.UseOp);
return DepCycle;
}
return std::max(Instrs, PRMax);
}
+
unsigned MachineTraceMetrics::Trace::
-getResourceLength(ArrayRef<const MachineBasicBlock*> Extrablocks) const {
+getResourceLength(ArrayRef<const MachineBasicBlock*> Extrablocks,
+ ArrayRef<const MCSchedClassDesc*> ExtraInstrs) const {
// Add up resources above and below the center block.
ArrayRef<unsigned> PRDepths = TE.getProcResourceDepths(getBlockNum());
ArrayRef<unsigned> PRHeights = TE.getProcResourceHeights(getBlockNum());
unsigned PRCycles = PRDepths[K] + PRHeights[K];
for (unsigned I = 0; I != Extrablocks.size(); ++I)
PRCycles += TE.MTM.getProcResourceCycles(Extrablocks[I]->getNumber())[K];
+ for (unsigned I = 0; I != ExtraInstrs.size(); ++I) {
+ const MCSchedClassDesc* SC = ExtraInstrs[I];
+ if (!SC->isValid())
+ continue;
+ for (TargetSchedModel::ProcResIter
+ PI = TE.MTM.SchedModel.getWriteProcResBegin(SC),
+ PE = TE.MTM.SchedModel.getWriteProcResEnd(SC); PI != PE; ++PI) {
+ if (PI->ProcResourceIdx != K)
+ continue;
+ PRCycles += (PI->Cycles * TE.MTM.SchedModel.getResourceFactor(K));
+ }
+ }
PRMax = std::max(PRMax, PRCycles);
}
// Convert to cycle count.