clk: rockchip: rk3399: Don't allow VPLL as aclk_cci clock source
[firefly-linux-kernel-4.4.55.git] / include / video / display_timing.h
index 82e7adc68c8956caf729872bfdaa91072fef4114..e9e168a56c5c78ac9bfdafc873bfd2e9e6c0bef1 100644 (file)
@@ -78,9 +78,12 @@ struct display_timing {
        enum display_flags flags;               /* display flags */
 #if defined(CONFIG_FB_ROCKCHIP)
        u16 screen_type;                        /*screen type*/
-       u16 lvds_format;                        /*lvds data format*/
-       u16 face;                               /*display output interface*/
-       u16 color_mode;                         /*input color mode: RGB/YUV*/
+       u16 refresh_mode;                       /* 0: video mode 1: cmd mode */
+       u16 screen_widt;                        /* screen physical size */
+       u16 screen_hight;
+       u16 lvds_format;                        /*lvds data format for lvds screen*/
+       u16 face;                               /*display output  interface format:24bit 18bit 16bit*/
+       u16 color_mode;                         /* input color mode: RGB or YUV */
        u32 *dsp_lut;
        u32 *cabc_lut;
        u32 *cabc_gamma_base;