#include <linux/kthread.h>
-#define RK30_MAX_LCDC_SUPPORT 4
-#define RK30_MAX_LAYER_SUPPORT 4
-#define RK_MAX_FB_SUPPORT 4
+#define RK30_MAX_LCDC_SUPPORT 2
+#define RK30_MAX_LAYER_SUPPORT 5
+#define RK_MAX_FB_SUPPORT 5
#define RK_WIN_MAX_AREA 4
-#define RK_MAX_BUF_NUM 10
+#define RK_MAX_BUF_NUM 11
#define FB0_IOCTL_STOP_TIMER_FLUSH 0x6001
#define FB0_IOCTL_SET_PANEL 0x6002
#define FB0_IOCTL_CLOSE_BUF 0x6019
#endif
-#define RK_FBIOGET_PANEL_SIZE 0x5001
-#define RK_FBIOSET_YUV_ADDR 0x5002
-#define RK_FBIOGET_SCREEN_STATE 0X4620
-#define RK_FBIOGET_16OR32 0X4621
-#define RK_FBIOGET_IDLEFBUff_16OR32 0X4622
-#define RK_FBIOSET_COMPOSE_LAYER_COUNTS 0X4623
-
-#define RK_FBIOGET_DMABUF_FD 0x5003
-#define RK_FBIOSET_DMABUF_FD 0x5004
-#define RK_FB_IOCTL_SET_I2P_ODD_ADDR 0x5005
-#define RK_FB_IOCTL_SET_I2P_EVEN_ADDR 0x5006
-#define RK_FBIOSET_OVERLAY_STATE 0x5018
-#define RK_FBIOGET_OVERLAY_STATE 0X4619
-#define RK_FBIOSET_ENABLE 0x5019
-#define RK_FBIOGET_ENABLE 0x5020
-#define RK_FBIOSET_CONFIG_DONE 0x4628
-#define RK_FBIOSET_VSYNC_ENABLE 0x4629
-#define RK_FBIOPUT_NUM_BUFFERS 0x4625
-#define RK_FBIOPUT_COLOR_KEY_CFG 0x4626
-#define RK_FBIOGET_DSP_ADDR 0x4630
-#define RK_FBIOGET_LIST_STAT 0X4631
+#define RK_FBIOGET_PANEL_SIZE 0x5001
+#define RK_FBIOSET_YUV_ADDR 0x5002
+#define RK_FBIOGET_SCREEN_STATE 0X4620
+#define RK_FBIOGET_16OR32 0X4621
+#define RK_FBIOGET_IDLEFBUff_16OR32 0X4622
+#define RK_FBIOSET_COMPOSE_LAYER_COUNTS 0X4623
+#define RK_FBIOSET_HWC_ADDR 0x4624
+
+#define RK_FBIOGET_DMABUF_FD 0x5003
+#define RK_FBIOSET_DMABUF_FD 0x5004
+#define RK_FB_IOCTL_SET_I2P_ODD_ADDR 0x5005
+#define RK_FB_IOCTL_SET_I2P_EVEN_ADDR 0x5006
+#define RK_FBIOSET_OVERLAY_STA 0x5018
+#define RK_FBIOGET_OVERLAY_STA 0X4619
+#define RK_FBIOSET_ENABLE 0x5019
+#define RK_FBIOGET_ENABLE 0x5020
+#define RK_FBIOSET_CONFIG_DONE 0x4628
+#define RK_FBIOSET_VSYNC_ENABLE 0x4629
+#define RK_FBIOPUT_NUM_BUFFERS 0x4625
+#define RK_FBIOPUT_COLOR_KEY_CFG 0x4626
+#define RK_FBIOGET_DSP_ADDR 0x4630
+#define RK_FBIOGET_LIST_STA 0X4631
+#define RK_FBIOGET_IOMMU_STA 0x4632
+#define RK_FBIOSET_CLEAR_FB 0x4633
/**rk fb events**/
#define RK_LF_MAX_TIMEOUT (1600000UL << 6) //>0.64s
-/*for x y mirror*/
+/* x y mirror or rotate mode */
#define NO_MIRROR 0
-#define X_MIRROR 1
-#define Y_MIRROR 2
-#define X_Y_MIRROR 3
+#define X_MIRROR 1 /* up-down flip*/
+#define Y_MIRROR 2 /* left-right flip */
+#define X_Y_MIRROR 3 /* the same as rotate 180 degrees */
+#define ROTATE_90 4 /* clockwise rotate 90 degrees */
+#define ROTATE_180 8 /* rotate 180 degrees
+ * It is recommended to use X_Y_MIRROR
+ * rather than ROTATE_180
+ */
+#define ROTATE_270 12 /* clockwise rotate 270 degrees */
-/*#define USE_ION_MMU 1*/
+
+/**
+* pixel align value for gpu,align as 64 bytes in an odd number of times
+*/
+#define ALIGN_PIXEL_64BYTE_RGB565 32 /* 64/2*/
+#define ALIGN_PIXEL_64BYTE_RGB8888 16 /* 64/4*/
+#define ALIGN_N_TIMES(x, align) (((x) % (align) == 0) ? (x) : (((x) + ((align) - 1)) & (~((align) - 1))))
+#define ALIGN_ODD_TIMES(x, align) (((x) % ((align) * 2) == 0) ? ((x) + (align)) : (x))
+#define ALIGN_64BYTE_ODD_TIMES(x, align) ALIGN_ODD_TIMES(ALIGN_N_TIMES(x, align), align)
+
+
+//#define USE_ION_MMU 1
#if defined(CONFIG_ION_ROCKCHIP)
-extern struct ion_client *rockchip_ion_client_create(const char * name);
+extern struct ion_client *rockchip_ion_client_create(const char *name);
#endif
extern int rk_fb_poll_prmry_screen_vblank(void);
-extern int rk_fb_get_prmry_screen_ft(void);
+extern u32 rk_fb_get_prmry_screen_ft(void);
+extern u32 rk_fb_get_prmry_screen_vbt(void);
+extern u64 rk_fb_get_prmry_screen_framedone_t(void);
+extern int rk_fb_set_prmry_screen_status(int status);
extern bool rk_fb_poll_wait_frame_complete(void);
/********************************************************************
#define OUT_CCIR656 6
#define OUT_S888 8
#define OUT_S888DUMY 12
+#define OUT_YUV_420 14
#define OUT_RGB_AAA 15
#define OUT_P16BPP4 24
#define OUT_D888_P666 0x21 //18bit screen,connect to lcdc D2~D7, D10~D15, D18~D23
HAL_PIXEL_FORMAT_YCrCb_420_SP_10 = 0x24, //YUV444_1obit
HAL_PIXEL_FORMAT_YCrCb_444 = 0x25, //yuv444
-
-
+ HAL_PIXEL_FORMAT_FBDC_RGB565 = 0x26,
+ HAL_PIXEL_FORMAT_FBDC_U8U8U8U8 = 0x27, /*ARGB888*/
+ HAL_PIXEL_FORMAT_FBDC_U8U8U8 = 0x28, /*RGBP888*/
+ HAL_PIXEL_FORMAT_FBDC_RGBA888 = 0x29, /*ABGR888*/
};
//display data format
ABGR888,
YUV420_A = 10,
YUV422_A,
- YUV444_A,
-};
-
-enum fb_win_map_order {
- FB_DEFAULT_ORDER = 0,
- FB0_WIN2_FB1_WIN1_FB2_WIN0 = 12,
- FB0_WIN1_FB1_WIN2_FB2_WIN0 = 21,
- FB0_WIN2_FB1_WIN0_FB2_WIN1 = 102,
- FB0_WIN0_FB1_WIN2_FB2_WIN1 = 120,
- FB0_WIN0_FB1_WIN1_FB2_WIN2 = 210,
- FB0_WIN1_FB1_WIN0_FB2_WIN2 = 201,
- FB0_WIN0_FB1_WIN1_FB2_WIN2_FB3_WIN3 = 3210,
+ YUV444_A,
+ YUV420_NV21,
+ FBDC_RGB_565 = 0x26,
+ FBDC_ARGB_888,
+ FBDC_RGBX_888,
+ FBDC_ABGR_888,
};
enum
{
- SCALE_NONE = 0x0,
- SCALE_UP = 0x1,
- SCALE_DOWN = 0x2
+ SCALE_NONE = 0x0,
+ SCALE_UP = 0x1,
+ SCALE_DOWN = 0x2
};
+typedef enum {
+ BRIGHTNESS = 0x0,
+ CONTRAST = 0x1,
+ SAT_CON = 0x2
+} bcsh_bcs_mode;
+
+typedef enum {
+ H_SIN = 0x0,
+ H_COS = 0x1
+} bcsh_hue_mode;
+
+typedef enum {
+ SCREEN_PREPARE_DDR_CHANGE = 0x0,
+ SCREEN_UNPREPARE_DDR_CHANGE,
+} screen_status;
struct rk_fb_rgb {
struct fb_bitfield red;
struct fb_bitfield transp;
};
+struct rk_fb_frame_time {
+ u64 last_framedone_t;
+ u64 framedone_t;
+ u32 ft;
+};
+
struct rk_fb_vsync {
wait_queue_head_t wait;
ktime_t timestamp;
int is_rst;
int gpio;
int atv_val;
- char rgl_name[32];
+ const char *rgl_name;
int volt;
int delay;
};
TRSP_INVAL
} TRSP_MODE;
-struct rk_lcdc_post_cfg{
+struct rk_lcdc_post_cfg {
u32 xpos;
u32 ypos;
u32 xsize;
u32 ysize;
};
-struct rk_lcdc_win_area{
+struct rk_lcdc_bcsh {
+ bool enable;
+ u16 brightness;
+ u16 contrast;
+ u16 sat_con;
+ u16 sin_hue;
+ u16 cos_hue;
+};
+
+struct rk_lcdc_win_area {
bool state;
+ enum data_format format;
+ u8 fmt_cfg;
+ u8 swap_rb;
+ u8 swap_uv;
u32 y_offset; /*yuv/rgb offset -->LCDC_WINx_YRGB_MSTx*/
u32 c_offset; /*cb cr offset--->LCDC_WINx_CBR_MSTx*/
- u32 xpos; /*start point in panel --->LCDC_WINx_DSP_ST*/
- u32 ypos;
+ u16 xpos; /*start point in panel --->LCDC_WINx_DSP_ST*/
+ u16 ypos;
u16 xsize; /* display window width/height -->LCDC_WINx_DSP_INFO*/
u16 ysize;
u16 xact; /*origin display window size -->LCDC_WINx_ACT_INFO*/
u16 yact;
u16 xvir; /*virtual width/height -->LCDC_WINx_VIR*/
u16 yvir;
+ u16 xoff; /*mem offset*/
+ u16 yoff;
unsigned long smem_start;
unsigned long cbr_start; /*Cbr memory start address*/
#if defined(CONFIG_ION_ROCKCHIP)
struct ion_handle *ion_hdl;
int dma_buf_fd;
+ struct dma_buf *dma_buf;
#endif
- u32 dsp_stx;
- u32 dsp_sty;
- u32 y_vir_stride;
- u32 uv_vir_stride;
+ u16 dsp_stx;
+ u16 dsp_sty;
+ u16 y_vir_stride;
+ u16 uv_vir_stride;
u32 y_addr;
u32 uv_addr;
+ u8 fbdc_en;
+ u8 fbdc_cor_en;
+ u8 fbdc_data_format;
+ u8 fbdc_dsp_width_ratio;
+ u8 fbdc_fmt_cfg;
+ u16 fbdc_mb_vir_width;
+ u16 fbdc_mb_vir_height;
+ u16 fbdc_mb_width;
+ u16 fbdc_mb_height;
+ u16 fbdc_mb_xst;
+ u16 fbdc_mb_yst;
+ u16 fbdc_num_tiles;
+ u16 fbdc_cmp_index_init;
};
bool state; /*on or off*/
bool last_state; /*on or off*/
u32 pseudo_pal[16];
- enum data_format format;
int z_order; /*win sel layer*/
- u8 fmt_cfg;
- u8 fmt_10;;
- u8 swap_rb;
+ u8 fmt_10;
u32 reserved;
u32 area_num;
u32 scale_yrgb_x;
u8 vsd_cbr_gt2;
u8 alpha_en;
- u32 alpha_mode;
- u32 g_alpha_val;
+ u8 alpha_mode;
+ u16 g_alpha_val;
+ u8 mirror_en;
u32 color_key_val;
+ u8 csc_mode;
struct rk_lcdc_win_area area[RK_WIN_MAX_AREA];
struct rk_lcdc_post_cfg post_cfg;
struct rk_fb_trsm_ops {
int (*enable)(void);
int (*disable)(void);
+ int (*dsp_pwr_on) (void);
+ int (*dsp_pwr_off) (void);
};
struct rk_lcdc_drv_ops {
- int (*open) (struct rk_lcdc_driver * dev_drv, int layer_id, bool open);
- int (*init_lcdc) (struct rk_lcdc_driver * dev_drv);
- int (*ioctl) (struct rk_lcdc_driver * dev_drv, unsigned int cmd,
+ int (*open) (struct rk_lcdc_driver *dev_drv, int layer_id, bool open);
+ int (*win_direct_en)(struct rk_lcdc_driver *dev_drv, int win_id, int en);
+ int (*init_lcdc) (struct rk_lcdc_driver *dev_drv);
+ int (*ioctl) (struct rk_lcdc_driver *dev_drv, unsigned int cmd,
unsigned long arg, int layer_id);
- int (*suspend) (struct rk_lcdc_driver * dev_drv);
- int (*resume) (struct rk_lcdc_driver * dev_drv);
- int (*blank) (struct rk_lcdc_driver * dev_drv, int layer_id,
+ int (*suspend) (struct rk_lcdc_driver *dev_drv);
+ int (*resume) (struct rk_lcdc_driver *dev_drv);
+ int (*blank) (struct rk_lcdc_driver *dev_drv, int layer_id,
int blank_mode);
- int (*set_par) (struct rk_lcdc_driver * dev_drv, int layer_id);
- int (*pan_display) (struct rk_lcdc_driver * dev_drv, int layer_id);
- int (*lcdc_reg_update) (struct rk_lcdc_driver * dev_drv);
- ssize_t(*get_disp_info) (struct rk_lcdc_driver * dev_drv, char *buf,
+ int (*set_par) (struct rk_lcdc_driver *dev_drv, int layer_id);
+ int (*pan_display) (struct rk_lcdc_driver *dev_drv, int layer_id);
+ int (*direct_set_addr)(struct rk_lcdc_driver *drv, int win_id, u32 addr);
+ int (*lcdc_reg_update) (struct rk_lcdc_driver *dev_drv);
+ ssize_t(*get_disp_info) (struct rk_lcdc_driver *dev_drv, char *buf,
int layer_id);
- int (*load_screen) (struct rk_lcdc_driver * dev_drv, bool initscreen);
- int (*get_win_state) (struct rk_lcdc_driver * dev_drv, int layer_id);
- int (*ovl_mgr) (struct rk_lcdc_driver * dev_drv, int swap, bool set); //overlay manager
- int (*fps_mgr) (struct rk_lcdc_driver * dev_drv, int fps, bool set);
- int (*fb_get_win_id) (struct rk_lcdc_driver * dev_drv, const char *id); //find layer for fb
- int (*fb_win_remap) (struct rk_lcdc_driver * dev_drv,
- enum fb_win_map_order order);
- int (*set_dsp_lut) (struct rk_lcdc_driver * dev_drv, int *lut);
- int (*read_dsp_lut) (struct rk_lcdc_driver * dev_drv, int *lut);
- int (*lcdc_hdmi_process) (struct rk_lcdc_driver * dev_drv, int mode); //some lcdc need to some process in hdmi mode
+ int (*load_screen) (struct rk_lcdc_driver *dev_drv, bool initscreen);
+ int (*get_dspbuf_info) (struct rk_lcdc_driver *dev_drv,
+ u16 *xact, u16 *yact, int *format,
+ u32 *dsp_addr);
+ int (*post_dspbuf)(struct rk_lcdc_driver *dev_drv, u32 rgb_mst,
+ int format, u16 xact, u16 yact, u16 xvir);
+
+ int (*get_win_state) (struct rk_lcdc_driver *dev_drv, int layer_id);
+ int (*ovl_mgr) (struct rk_lcdc_driver *dev_drv, int swap, bool set); /*overlay manager*/
+ int (*fps_mgr) (struct rk_lcdc_driver *dev_drv, int fps, bool set);
+ int (*fb_get_win_id) (struct rk_lcdc_driver *dev_drv, const char *id); /*find layer for fb*/
+ int (*fb_win_remap) (struct rk_lcdc_driver *dev_drv,
+ u16 fb_win_map_order);
+ int (*set_dsp_lut) (struct rk_lcdc_driver *dev_drv, int *lut);
+ int (*set_cabc_lut)(struct rk_lcdc_driver *dev_drv, int *lut);
+ int (*set_hwc_lut) (struct rk_lcdc_driver *dev_drv, int *hwc_lut, int mode);
+ int (*read_dsp_lut) (struct rk_lcdc_driver *dev_drv, int *lut);
+ int (*lcdc_hdmi_process) (struct rk_lcdc_driver *dev_drv, int mode); /*some lcdc need to some process in hdmi mode*/
int (*set_irq_to_cpu)(struct rk_lcdc_driver *dev_drv,int enable);
- int (*poll_vblank) (struct rk_lcdc_driver * dev_drv);
- int (*lcdc_rst) (struct rk_lcdc_driver * dev_drv);
- int (*dpi_open) (struct rk_lcdc_driver * dev_drv, bool open);
- int (*dpi_win_sel) (struct rk_lcdc_driver * dev_drv, int layer_id);
- int (*dpi_status) (struct rk_lcdc_driver * dev_drv);
- int (*get_dsp_addr)(struct rk_lcdc_driver * dev_drv,unsigned int *dsp_addr);
- int (*set_dsp_cabc) (struct rk_lcdc_driver * dev_drv, int mode);
- int (*set_dsp_hue) (struct rk_lcdc_driver *dev_drv,int hue);
- int (*set_dsp_bcsh_bcs)(struct rk_lcdc_driver *dev_drv,int bri,int con,int sat);
- int (*dump_reg) (struct rk_lcdc_driver * dev_drv);
- int (*mmu_en) (struct rk_lcdc_driver * dev_drv);
- int (*cfg_done) (struct rk_lcdc_driver * dev_drv);
+ int (*poll_vblank) (struct rk_lcdc_driver *dev_drv);
+ int (*lcdc_rst) (struct rk_lcdc_driver *dev_drv);
+ int (*dpi_open) (struct rk_lcdc_driver *dev_drv, bool open);
+ int (*dpi_win_sel) (struct rk_lcdc_driver *dev_drv, int layer_id);
+ int (*dpi_status) (struct rk_lcdc_driver *dev_drv);
+ int (*get_dsp_addr)(struct rk_lcdc_driver *dev_drv,unsigned int *dsp_addr);
+ int (*set_dsp_cabc) (struct rk_lcdc_driver *dev_drv, int mode, int calc, int up, int down, int global);
+ int (*set_dsp_bcsh_hue) (struct rk_lcdc_driver *dev_drv,int sin_hue, int cos_hue);
+ int (*set_dsp_bcsh_bcs)(struct rk_lcdc_driver *dev_drv,bcsh_bcs_mode mode,int value);
+ int (*get_dsp_bcsh_hue) (struct rk_lcdc_driver *dev_drv,bcsh_hue_mode mode);
+ int (*get_dsp_bcsh_bcs)(struct rk_lcdc_driver *dev_drv,bcsh_bcs_mode mode);
+ int (*open_bcsh)(struct rk_lcdc_driver *dev_drv, bool open);
+ int (*set_screen_scaler) (struct rk_lcdc_driver *dev_drv, struct rk_screen *screen, bool enable);
+ int (*dump_reg) (struct rk_lcdc_driver *dev_drv);
+ int (*mmu_en) (struct rk_lcdc_driver *dev_drv);
+ int (*cfg_done) (struct rk_lcdc_driver *dev_drv);
+ int (*set_overscan) (struct rk_lcdc_driver *dev_drv,
+ struct overscan *overscan);
+ int (*dsp_black) (struct rk_lcdc_driver *dev_drv, int enable);
+ int (*backlight_close)(struct rk_lcdc_driver *dev_drv, int enable);
};
struct rk_fb_area_par {
- int ion_fd;
- unsigned long phy_addr;
- int acq_fence_fd;
- u32 x_offset;
- u32 y_offset;
- u32 xpos; /*start point in panel --->LCDC_WINx_DSP_ST*/
- u32 ypos;
- u32 xsize; /* display window width/height -->LCDC_WINx_DSP_INFO*/
- u32 ysize;
- u32 xact; /*origin display window size -->LCDC_WINx_ACT_INFO*/
- u32 yact;
- u32 xvir; /*virtual width/height -->LCDC_WINx_VIR*/
- u32 yvir;
+ u8 data_format; /*layer data fmt*/
+ short ion_fd;
+ u32 phy_addr;
+ short acq_fence_fd;
+ u16 x_offset;
+ u16 y_offset;
+ u16 xpos; /*start point in panel --->LCDC_WINx_DSP_ST*/
+ u16 ypos;
+ u16 xsize; /* display window width/height -->LCDC_WINx_DSP_INFO*/
+ u16 ysize;
+ u16 xact; /*origin display window size -->LCDC_WINx_ACT_INFO*/
+ u16 yact;
+ u16 xvir; /*virtual width/height -->LCDC_WINx_VIR*/
+ u16 yvir;
+ u8 fbdc_en;
+ u8 fbdc_cor_en;
+ u8 fbdc_data_format;
+ u16 reserved0;
+ u32 reserved1;
};
struct rk_fb_win_par {
- u8 data_format; /*layer data fmt*/
- u8 win_id;
- u8 z_order; /*win sel layer*/
+ u8 win_id;
+ u8 z_order; /*win sel layer*/
+ u8 alpha_mode;
+ u16 g_alpha_val;
+ u8 mirror_en;
struct rk_fb_area_par area_par[RK_WIN_MAX_AREA];
- u32 alpha_mode;
- u32 g_alpha_val;
+ u32 reserved0;
};
struct rk_fb_win_cfg_data {
- int ret_fence_fd;
- int rel_fence_fd[RK_MAX_BUF_NUM];
+ u8 wait_fs;
+ short ret_fence_fd;
+ short rel_fence_fd[RK_MAX_BUF_NUM];
struct rk_fb_win_par win_par[RK30_MAX_LAYER_SUPPORT];
struct rk_lcdc_post_cfg post_cfg;
- u8 wait_fs;
- //u8 fence_begin;
};
struct rk_fb_reg_area_data {
struct sync_fence *acq_fence;
+ u8 data_format; /*layer data fmt*/
u8 index_buf; /*judge if the buffer is index*/
u32 y_offset; /*yuv/rgb offset -->LCDC_WINx_YRGB_MSTx*/
u32 c_offset; /*cb cr offset--->LCDC_WINx_CBR_MSTx*/
u32 y_vir_stride;
u32 uv_vir_stride;
- u32 xpos; /*start point in panel --->LCDC_WINx_DSP_ST*/
- u32 ypos;
+ u32 buff_len;
+ u16 xpos; /*start point in panel --->LCDC_WINx_DSP_ST*/
+ u16 ypos;
u16 xsize; /* display window width/height -->LCDC_WINx_DSP_INFO*/
u16 ysize;
u16 xact; /*origin display window size -->LCDC_WINx_ACT_INFO*/
u16 yact;
u16 xvir; /*virtual width/height -->LCDC_WINx_VIR*/
u16 yvir;
+ u16 xoff; /*mem offset*/
+ u16 yoff;
unsigned long smem_start;
unsigned long cbr_start; /*Cbr memory start address*/
u32 line_length;
struct dma_buf_attachment *attachment;
struct sg_table *sg_table;
dma_addr_t dma_addr;
-#endif
+#endif
+ u8 fbdc_en;
+ u8 fbdc_cor_en;
+ u8 fbdc_data_format;
};
struct rk_fb_reg_win_data {
- u8 data_format; /*layer data fmt*/
u8 win_id;
u8 z_order; /*win sel layer*/
u32 area_num; /*maybe two region have the same dma buff,*/
u32 area_buf_num; /*so area_num maybe not equal to area_buf_num*/
u8 alpha_en;
- u32 alpha_mode;
- u32 g_alpha_val;
- u32 color_key_val;
+ u8 alpha_mode;
+ u16 g_alpha_val;
+ u8 mirror_en;
struct rk_fb_reg_area_data reg_area_data[RK_WIN_MAX_AREA];
};
struct rk_fb_reg_data {
struct list_head list;
- int win_num;
- int buf_num;
- int acq_num;
+ int win_num;
+ int buf_num;
+ int acq_num;
struct rk_fb_reg_win_data reg_win_data[RK30_MAX_LAYER_SUPPORT];
struct rk_lcdc_post_cfg post_cfg;
- //struct sync_fence *acq_fence[RK_MAX_BUF_NUM];
- //int fence_wait_begin;
};
struct rk_lcdc_driver {
char name[6];
- int id;
- int prop;
+ int id;
+ int prop;
struct device *dev;
struct rk_lcdc_win *win[RK_MAX_FB_SUPPORT];
struct rk_screen *screen1; //two display devices for dual display,such as rk2918,rk2928
struct rk_screen *cur_screen; //screen0 is primary screen ,like lcd panel,screen1 is extend screen,like hdmi
u32 pixclock;
+ u16 rotate_mode;
+ u16 cabc_mode;
+ u16 overlay_mode;
+ u16 output_color;
+ u16 fb_win_map;
char fb0_win_id;
char fb1_win_id;
char fb2_win_id;
char fb3_win_id;
+ char fb4_win_id;
+
char mmu_dts_name[40];
+ struct device *mmu_dev;
+ int iommu_enabled;
+
struct rk_fb_reg_area_data reg_area_data;
+ /*
+ * front_regs means this config is scaning on the devices.
+ */
+ struct rk_fb_reg_data *front_regs;
+ struct mutex front_lock;
+
struct mutex fb_win_id_mutex;
+ struct mutex win_config;
- struct completion frame_done; //sync for pan_display,whe we set a new frame address to lcdc register,we must make sure the frame begain to display
- spinlock_t cpl_lock; //lock for completion frame done
+ struct completion frame_done; /*sync for pan_display,whe we set a new
+ frame address to lcdc register,we must
+ make sure the frame begain to display*/
+ spinlock_t cpl_lock; /*lock for completion frame done */
int first_frame;
struct rk_fb_vsync vsync_info;
- int wait_fs; //wait for new frame start in kernel
+ struct rk_fb_frame_time frame_time;
+ int wait_fs; /*wait for new frame start in kernel */
struct sw_sync_timeline *timeline;
int timeline_max;
int suspend_flag;
struct list_head update_regs_list;
+ struct list_head saved_list;
struct mutex update_regs_list_lock;
struct kthread_worker update_regs_worker;
struct task_struct *update_regs_thread;
struct kthread_work update_regs_work;
+ wait_queue_head_t update_regs_wait;
struct mutex output_lock;
struct rk29fb_info *screen_ctr_info;
#ifdef CONFIG_DRM_ROCKCHIP
void (*irq_call_back)(struct rk_lcdc_driver *driver);
#endif
+ struct overscan overscan;
+ struct rk_lcdc_bcsh bcsh;
+ int *hwc_lut;
+ int uboot_logo;
+ int bcsh_init_status;
+ bool cabc_pwm_pol;
+ u8 reserved_fb;
+ /*1:hdmi switch uncomplete,0:complete*/
+ bool hdmi_switch;
+ void *trace_buf;
+};
+
+struct rk_fb_par {
+ int id;
+ u32 state;
+ unsigned long fb_phy_base; /* Start of fb address (physical address) */
+ char __iomem *fb_virt_base; /* Start of fb address (virt address) */
+ u32 fb_size;
+ struct rk_lcdc_driver *lcdc_drv;
+
+#if defined(CONFIG_ION_ROCKCHIP)
+ struct ion_handle *ion_hdl;
+#endif
+ u32 reserved[2];
};
/*disp_mode: dual display mode
struct rk_fb {
int disp_mode;
+ int disp_policy;
struct rk29fb_info *mach_info;
struct fb_info *fb[RK_MAX_FB_SUPPORT*2];
int num_fb;
-
struct rk_lcdc_driver *lcdc_dev_drv[RK30_MAX_LCDC_SUPPORT];
int num_lcdc;
#if defined(CONFIG_ION_ROCKCHIP)
- struct ion_client * ion_client;
+ struct ion_client *ion_client;
#endif
-
-
};
extern int rk_fb_trsm_ops_register(struct rk_fb_trsm_ops *ops, int type);
-extern struct rk_fb_trsm_ops * rk_fb_trsm_ops_get(int type);
+extern struct rk_fb_trsm_ops *rk_fb_trsm_ops_get(int type);
extern int rk_fb_register(struct rk_lcdc_driver *dev_drv,
struct rk_lcdc_win *win, int id);
extern int rk_fb_unregister(struct rk_lcdc_driver *dev_drv);
extern int rk_fb_dpi_layer_sel(int layer_id);
extern int rk_fb_dpi_status(void);
-extern int rk_fb_switch_screen(struct rk_screen * screen, int enable, int lcdc_id);
+extern int rk_fb_switch_screen(struct rk_screen *screen, int enable, int lcdc_id);
extern int rk_fb_disp_scale(u8 scale_x, u8 scale_y, u8 lcdc_id);
extern int rkfb_create_sysfs(struct fb_info *fbi);
extern char *get_format_string(enum data_format, char *fmt);
extern int support_uboot_display(void);
-extern int rk_fb_calc_fps(struct rk_screen * screen, u32 pixclock);
+extern int rk_fb_calc_fps(struct rk_screen *screen, u32 pixclock);
+extern int rk_get_real_fps(int time);
+extern struct device *rk_fb_get_sysmmu_device_by_compatible(const char *compt);
+extern void rk_fb_platform_set_sysmmu(struct device *sysmmu,
+ struct device *dev);
+int rk_fb_get_display_policy(void);
+int rk_fb_pixel_width(int data_format);
+void trace_buffer_dump(struct device *dev,
+ struct rk_lcdc_driver *dev_drv);
#endif