Merge tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

[firefly-linux-kernel-4.4.55.git] / include / linux / pci.h

diff --git a/include/linux/pci.h b/include/linux/pci.h
index a691f62bcf892ac177b79bbcef41d0305310d3c7..5faa8310eec9ea02df6618345eb299cdee74d26b 100644 (file)
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -132,9 +132,10 @@ static inline const char *pci_power_name(pci_power_t state)
        return pci_power_names[1 + (int) state];
 }
 
-#define PCI_PM_D2_DELAY        200
-#define PCI_PM_D3_WAIT 10
-#define PCI_PM_BUS_WAIT        50
+#define PCI_PM_D2_DELAY                200
+#define PCI_PM_D3_WAIT         10
+#define PCI_PM_D3COLD_WAIT     100
+#define PCI_PM_BUS_WAIT                50
 
 /** The pci_channel state describes connectivity between the CPU and
  *  the pci device.  If some PCI bus between here and the pci device
@@ -278,11 +279,18 @@ struct pci_dev {
        unsigned int    pme_poll:1;     /* Poll device's PME status bit */
        unsigned int    d1_support:1;   /* Low power state D1 is supported */
        unsigned int    d2_support:1;   /* Low power state D2 is supported */
-       unsigned int    no_d1d2:1;      /* Only allow D0 and D3 */
+       unsigned int    no_d1d2:1;      /* D1 and D2 are forbidden */
+       unsigned int    no_d3cold:1;    /* D3cold is forbidden */
+       unsigned int    d3cold_allowed:1;       /* D3cold is allowed by user */
        unsigned int    mmio_always_on:1;       /* disallow turning off io/mem
                                                   decoding during bar sizing */
        unsigned int    wakeup_prepared:1;
+       unsigned int    runtime_d3cold:1;       /* whether go through runtime
+                                                  D3cold, not set for devices
+                                                  powered on/off by the
+                                                  corresponding bridge */
        unsigned int    d3_delay;       /* D3->D0 transition time in ms */
+       unsigned int    d3cold_delay;   /* D3cold->D0 transition time in ms */
 
 #ifdef CONFIG_PCIEASPM
        struct pcie_link_state  *link_state;    /* ASPM link state. */
@@ -324,6 +332,8 @@ struct pci_dev {
        unsigned int    is_hotplug_bridge:1;
        unsigned int    __aer_firmware_first_valid:1;
        unsigned int    __aer_firmware_first:1;
+       unsigned int    broken_intx_masking:1;
+       unsigned int    io_window_1k:1; /* Intel P2P bridge 1K I/O windows */
        pci_dev_flags_t dev_flags;
        atomic_t        enable_cnt;     /* pci_enable_device has been called */
 
@@ -368,6 +378,8 @@ static inline int pci_channel_offline(struct pci_dev *pdev)
        return (pdev->error_state != pci_channel_io_normal);
 }
 
+extern struct resource busn_resource;
+
 struct pci_host_bridge_window {
        struct list_head list;
        struct resource *res;           /* host bridge aperture (CPU address) */
@@ -419,6 +431,7 @@ struct pci_bus {
        struct list_head slots;         /* list of slots on this bus */
        struct resource *resource[PCI_BRIDGE_RESOURCE_NUM];
        struct list_head resources;     /* address space routed to this bus */
+       struct resource busn_res;       /* bus numbers routed to this bus */
 
        struct pci_ops  *ops;           /* configuration access functions */
        void            *sysdata;       /* hook for sys-specific extension */
@@ -426,8 +439,6 @@ struct pci_bus {
 
        unsigned char   number;         /* bus number */
        unsigned char   primary;        /* number of primary bridge */
-       unsigned char   secondary;      /* number of secondary bridge */
-       unsigned char   subordinate;    /* max number of subordinate buses */
        unsigned char   max_bus_speed;  /* enum pci_bus_speed */
        unsigned char   cur_bus_speed;  /* enum pci_bus_speed */
 
@@ -668,6 +679,7 @@ extern int no_pci_devices(void);
 
 void pcibios_fixup_bus(struct pci_bus *);
 int __must_check pcibios_enable_device(struct pci_dev *, int mask);
+/* Architecture specific versions may override this (weak) */
 char *pcibios_setup(char *str);
 
 /* Used only when drivers/pci/setup.c is used */
@@ -694,6 +706,9 @@ struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata);
 struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
                                    struct pci_ops *ops, void *sysdata,
                                    struct list_head *resources);
+int pci_bus_insert_busn_res(struct pci_bus *b, int bus, int busmax);
+int pci_bus_update_busn_res_end(struct pci_bus *b, int busmax);
+void pci_bus_release_busn_res(struct pci_bus *b);
 struct pci_bus * __devinit pci_scan_root_bus(struct device *parent, int bus,
                                             struct pci_ops *ops, void *sysdata,
                                             struct list_head *resources);
@@ -740,8 +755,6 @@ enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev);
 int pci_find_capability(struct pci_dev *dev, int cap);
 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
 int pci_find_ext_capability(struct pci_dev *dev, int cap);
-int pci_bus_find_ext_capability(struct pci_bus *bus, unsigned int devfn,
-                               int cap);
 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
@@ -909,7 +922,6 @@ enum pci_obff_signal_type {
 int pci_enable_obff(struct pci_dev *dev, enum pci_obff_signal_type);
 void pci_disable_obff(struct pci_dev *dev);
 
-bool pci_ltr_supported(struct pci_dev *dev);
 int pci_enable_ltr(struct pci_dev *dev);
 void pci_disable_ltr(struct pci_dev *dev);
 int pci_set_ltr(struct pci_dev *dev, int snoop_lat_ns, int nosnoop_lat_ns);