drm/drm-prime: cache dma_buf import context

[firefly-linux-kernel-4.4.55.git] / include / linux / libata.h

diff --git a/include/linux/libata.h b/include/linux/libata.h
index 600c1e0626a5ff6c91df3a0b2f2fcf0ef485fedf..b20a2752f934f8f427d796341ed0a433f1948487 100644 (file)
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -718,7 +718,7 @@ struct ata_device {
        union {
                u16             id[ATA_ID_WORDS]; /* IDENTIFY xxx DEVICE data */
                u32             gscr[SATA_PMP_GSCR_DWORDS]; /* PMP GSCR block */
-       };
+       } ____cacheline_aligned;
 
        /* DEVSLP Timing Variables from Identify Device Data Log */
        u8                      devslp_timing[ATA_LOG_DEVSLP_SIZE];