[PATCH] kill SET_LINKS/REMOVE_LINKS
[firefly-linux-kernel-4.4.55.git] / include / asm-powerpc / cputable.h
index 5638518968c3d8a9b2c543983d5eb389505ca0b5..fe45f6f3a4bee59fa4d4757834190ff4c5e44b96 100644 (file)
@@ -102,38 +102,40 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
 #define CPU_FTR_NEED_COHERENT          ASM_CONST(0x0000000000020000)
 #define CPU_FTR_NO_BTIC                        ASM_CONST(0x0000000000040000)
 #define CPU_FTR_BIG_PHYS               ASM_CONST(0x0000000000080000)
-#define CPU_FTR_NODSISRALIGN           ASM_CONST(0x0000000000100000)
+#define CPU_FTR_NODSISRALIGN           ASM_CONST(0x0000000000100000)
 
 #ifdef __powerpc64__
 /* Add the 64b processor unique features in the top half of the word */
-#define CPU_FTR_SLB                    ASM_CONST(0x0000000100000000)
-#define CPU_FTR_16M_PAGE               ASM_CONST(0x0000000200000000)
-#define CPU_FTR_TLBIEL                         ASM_CONST(0x0000000400000000)
-#define CPU_FTR_NOEXECUTE              ASM_CONST(0x0000000800000000)
-#define CPU_FTR_IABR                   ASM_CONST(0x0000002000000000)
-#define CPU_FTR_MMCRA                          ASM_CONST(0x0000004000000000)
+#define CPU_FTR_SLB                    ASM_CONST(0x0000000100000000)
+#define CPU_FTR_16M_PAGE               ASM_CONST(0x0000000200000000)
+#define CPU_FTR_TLBIEL                 ASM_CONST(0x0000000400000000)
+#define CPU_FTR_NOEXECUTE              ASM_CONST(0x0000000800000000)
+#define CPU_FTR_IABR                   ASM_CONST(0x0000002000000000)
+#define CPU_FTR_MMCRA                  ASM_CONST(0x0000004000000000)
 #define CPU_FTR_CTRL                   ASM_CONST(0x0000008000000000)
-#define CPU_FTR_SMT                    ASM_CONST(0x0000010000000000)
-#define CPU_FTR_COHERENT_ICACHE        ASM_CONST(0x0000020000000000)
+#define CPU_FTR_SMT                    ASM_CONST(0x0000010000000000)
+#define CPU_FTR_COHERENT_ICACHE                ASM_CONST(0x0000020000000000)
 #define CPU_FTR_LOCKLESS_TLBIE         ASM_CONST(0x0000040000000000)
 #define CPU_FTR_MMCRA_SIHV             ASM_CONST(0x0000080000000000)
 #define CPU_FTR_CI_LARGE_PAGE          ASM_CONST(0x0000100000000000)
 #define CPU_FTR_PAUSE_ZERO             ASM_CONST(0x0000200000000000)
+#define CPU_FTR_PURR                   ASM_CONST(0x0000400000000000)
 #else
 /* ensure on 32b processors the flags are available for compiling but
  * don't do anything */
-#define CPU_FTR_SLB                    ASM_CONST(0x0)
-#define CPU_FTR_16M_PAGE               ASM_CONST(0x0)
-#define CPU_FTR_TLBIEL                         ASM_CONST(0x0)
-#define CPU_FTR_NOEXECUTE              ASM_CONST(0x0)
-#define CPU_FTR_IABR                   ASM_CONST(0x0)
-#define CPU_FTR_MMCRA                          ASM_CONST(0x0)
+#define CPU_FTR_SLB                    ASM_CONST(0x0)
+#define CPU_FTR_16M_PAGE               ASM_CONST(0x0)
+#define CPU_FTR_TLBIEL                 ASM_CONST(0x0)
+#define CPU_FTR_NOEXECUTE              ASM_CONST(0x0)
+#define CPU_FTR_IABR                   ASM_CONST(0x0)
+#define CPU_FTR_MMCRA                  ASM_CONST(0x0)
 #define CPU_FTR_CTRL                   ASM_CONST(0x0)
-#define CPU_FTR_SMT                    ASM_CONST(0x0)
-#define CPU_FTR_COHERENT_ICACHE        ASM_CONST(0x0)
+#define CPU_FTR_SMT                    ASM_CONST(0x0)
+#define CPU_FTR_COHERENT_ICACHE                ASM_CONST(0x0)
 #define CPU_FTR_LOCKLESS_TLBIE         ASM_CONST(0x0)
 #define CPU_FTR_MMCRA_SIHV             ASM_CONST(0x0)
 #define CPU_FTR_CI_LARGE_PAGE          ASM_CONST(0x0)
+#define CPU_FTR_PURR                   ASM_CONST(0x0)
 #endif
 
 #ifndef __ASSEMBLY__
@@ -318,7 +320,7 @@ enum {
            CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 |
            CPU_FTR_MMCRA | CPU_FTR_SMT |
            CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE |
-           CPU_FTR_MMCRA_SIHV,
+           CPU_FTR_MMCRA_SIHV | CPU_FTR_PURR,
        CPU_FTRS_CELL = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
            CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 |
            CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT |