#include <linux/mman.h>\r
#include <linux/sched.h>\r
#include <linux/slab.h>\r
+#include <linux/memory.h>\r
+#include <linux/dma-mapping.h>\r
+#include <asm/memory.h>\r
#include <asm/atomic.h>\r
-\r
-\r
+#include <asm/cacheflush.h>\r
#include "rga_mmu_info.h"\r
+#include <linux/delay.h>\r
\r
extern rga_service_info rga_service;\r
-extern int mmu_buff_temp[1024];\r
+extern struct rga_mmu_buf_t rga_mmu_buf;\r
\r
#define KERNEL_SPACE_VALID 0xc0000000\r
\r
-int mmu_flag = 0;\r
+static int rga_mmu_buf_get(struct rga_mmu_buf_t *t, uint32_t size)\r
+{\r
+ mutex_lock(&rga_service.lock);\r
+ t->front += size;\r
+ mutex_unlock(&rga_service.lock);\r
+\r
+ return 0;\r
+}\r
+\r
+static int rga_mmu_buf_get_try(struct rga_mmu_buf_t *t, uint32_t size)\r
+{\r
+ mutex_lock(&rga_service.lock);\r
+ if((t->back - t->front) > t->size) {\r
+ if(t->front + size > t->back - t->size)\r
+ return -1;\r
+ }\r
+ else {\r
+ if((t->front + size) > t->back)\r
+ return -1;\r
+\r
+ if(t->front + size > t->size) {\r
+ if (size > (t->back - t->size)) {\r
+ return -1;\r
+ }\r
+ t->front = 0;\r
+ }\r
+ }\r
+ mutex_unlock(&rga_service.lock);\r
+\r
+ return 0;\r
+}\r
\r
-static int rga_mem_size_cal(uint32_t Mem, uint32_t MemSize, uint32_t *StartAddr) \r
+static int rga_mem_size_cal(unsigned long Mem, uint32_t MemSize, unsigned long *StartAddr)\r
{\r
- uint32_t start, end;\r
+ unsigned long start, end;\r
uint32_t pageCount;\r
\r
end = (Mem + (MemSize + PAGE_SIZE - 1)) >> PAGE_SHIFT;\r
start = Mem >> PAGE_SHIFT;\r
pageCount = end - start;\r
*StartAddr = start;\r
- return pageCount; \r
+ return pageCount;\r
}\r
\r
-static int rga_buf_size_cal(uint32_t yrgb_addr, uint32_t uv_addr, uint32_t v_addr, \r
- int format, uint32_t w, uint32_t h, uint32_t *StartAddr ) \r
+static int rga_buf_size_cal(unsigned long yrgb_addr, unsigned long uv_addr, unsigned long v_addr,\r
+ int format, uint32_t w, uint32_t h, unsigned long *StartAddr )\r
{\r
uint32_t size_yrgb = 0;\r
uint32_t size_uv = 0;\r
uint32_t size_v = 0;\r
uint32_t stride = 0;\r
- uint32_t start, end;\r
+ unsigned long start, end;\r
uint32_t pageCount;\r
- \r
+\r
switch(format)\r
{\r
case RK_FORMAT_RGBA_8888 :\r
stride = (w * 4 + 3) & (~3);\r
size_yrgb = stride*h;\r
- end = (yrgb_addr + (size_yrgb + PAGE_SIZE - 1)) >> PAGE_SHIFT;\r
start = yrgb_addr >> PAGE_SHIFT;\r
- pageCount = end - start; \r
+ pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;\r
break;\r
case RK_FORMAT_RGBX_8888 :\r
stride = (w * 4 + 3) & (~3);\r
size_yrgb = stride*h;\r
- end = (yrgb_addr + (size_yrgb + PAGE_SIZE - 1)) >> PAGE_SHIFT;\r
start = yrgb_addr >> PAGE_SHIFT;\r
- pageCount = end - start;\r
+ pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;\r
break;\r
case RK_FORMAT_RGB_888 :\r
stride = (w * 3 + 3) & (~3);\r
size_yrgb = stride*h;\r
- end = (yrgb_addr + (size_yrgb + PAGE_SIZE - 1)) >> PAGE_SHIFT;\r
start = yrgb_addr >> PAGE_SHIFT;\r
- pageCount = end - start;\r
+ pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;\r
break;\r
case RK_FORMAT_BGRA_8888 :\r
size_yrgb = w*h*4;\r
- end = (yrgb_addr + (size_yrgb + PAGE_SIZE - 1)) >> PAGE_SHIFT;\r
start = yrgb_addr >> PAGE_SHIFT;\r
- pageCount = end - start;\r
+ pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;\r
break;\r
case RK_FORMAT_RGB_565 :\r
- stride = (w*2 + 3) & (~3); \r
+ stride = (w*2 + 3) & (~3);\r
size_yrgb = stride * h;\r
- end = (yrgb_addr + (size_yrgb + PAGE_SIZE - 1)) >> PAGE_SHIFT;\r
start = yrgb_addr >> PAGE_SHIFT;\r
- pageCount = end - start;\r
+ pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;\r
break;\r
case RK_FORMAT_RGBA_5551 :\r
- stride = (w*2 + 3) & (~3); \r
+ stride = (w*2 + 3) & (~3);\r
size_yrgb = stride * h;\r
- end = (yrgb_addr + (size_yrgb + PAGE_SIZE - 1)) >> PAGE_SHIFT;\r
start = yrgb_addr >> PAGE_SHIFT;\r
- pageCount = end - start;\r
+ pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;\r
break;\r
case RK_FORMAT_RGBA_4444 :\r
- stride = (w*2 + 3) & (~3); \r
+ stride = (w*2 + 3) & (~3);\r
size_yrgb = stride * h;\r
- end = (yrgb_addr + (size_yrgb + PAGE_SIZE - 1)) >> PAGE_SHIFT;\r
start = yrgb_addr >> PAGE_SHIFT;\r
- pageCount = end - start;\r
+ pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;\r
break;\r
case RK_FORMAT_BGR_888 :\r
- stride = (w*3 + 3) & (~3); \r
+ stride = (w*3 + 3) & (~3);\r
size_yrgb = stride * h;\r
- end = (yrgb_addr + (size_yrgb + PAGE_SIZE - 1)) >> PAGE_SHIFT;\r
start = yrgb_addr >> PAGE_SHIFT;\r
- pageCount = end - start;\r
+ pageCount = (size_yrgb + PAGE_SIZE - 1) >> PAGE_SHIFT;\r
break;\r
\r
/* YUV FORMAT */\r
size_yrgb = stride * h;\r
size_uv = stride * h;\r
start = MIN(yrgb_addr, uv_addr);\r
- start >>= PAGE_SHIFT; \r
+\r
+ start >>= PAGE_SHIFT;\r
end = MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv));\r
end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;\r
- pageCount = end - start; \r
+ pageCount = end - start;\r
break;\r
case RK_FORMAT_YCbCr_422_P :\r
stride = (w + 3) & (~3);\r
size_uv = ((stride >> 1) * h);\r
size_v = ((stride >> 1) * h);\r
start = MIN(MIN(yrgb_addr, uv_addr), v_addr);\r
- start = start >> PAGE_SHIFT; \r
+ start = start >> PAGE_SHIFT;\r
end = MAX(MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv)), (v_addr + size_v));\r
end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;\r
- pageCount = end - start; \r
+ pageCount = end - start;\r
break;\r
case RK_FORMAT_YCbCr_420_SP :\r
stride = (w + 3) & (~3);\r
size_yrgb = stride * h;\r
- size_uv = (stride * (h >> 1)); \r
+ size_uv = (stride * (h >> 1));\r
start = MIN(yrgb_addr, uv_addr);\r
- start >>= PAGE_SHIFT; \r
+ start >>= PAGE_SHIFT;\r
end = MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv));\r
end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;\r
pageCount = end - start;\r
size_uv = ((stride >> 1) * (h >> 1));\r
size_v = ((stride >> 1) * (h >> 1));\r
start = MIN(MIN(yrgb_addr, uv_addr), v_addr);\r
- start >>= PAGE_SHIFT; \r
+ start >>= PAGE_SHIFT;\r
end = MAX(MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv)), (v_addr + size_v));\r
end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;\r
- pageCount = end - start; \r
+ pageCount = end - start;\r
break;\r
\r
case RK_FORMAT_YCrCb_422_SP :\r
size_yrgb = stride * h;\r
size_uv = stride * h;\r
start = MIN(yrgb_addr, uv_addr);\r
- start >>= PAGE_SHIFT; \r
+ start >>= PAGE_SHIFT;\r
end = MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv));\r
end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;\r
pageCount = end - start;\r
size_uv = ((stride >> 1) * h);\r
size_v = ((stride >> 1) * h);\r
start = MIN(MIN(yrgb_addr, uv_addr), v_addr);\r
- start >>= PAGE_SHIFT; \r
+ start >>= PAGE_SHIFT;\r
end = MAX(MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv)), (v_addr + size_v));\r
end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;\r
pageCount = end - start;\r
break;\r
- \r
+\r
case RK_FORMAT_YCrCb_420_SP :\r
stride = (w + 3) & (~3);\r
size_yrgb = stride * h;\r
- size_uv = (stride * (h >> 1)); \r
+ size_uv = (stride * (h >> 1));\r
start = MIN(yrgb_addr, uv_addr);\r
- start >>= PAGE_SHIFT; \r
+ start >>= PAGE_SHIFT;\r
end = MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv));\r
end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;\r
pageCount = end - start;\r
size_uv = ((stride >> 1) * (h >> 1));\r
size_v = ((stride >> 1) * (h >> 1));\r
start = MIN(MIN(yrgb_addr, uv_addr), v_addr);\r
- start >>= PAGE_SHIFT; \r
+ start >>= PAGE_SHIFT;\r
end = MAX(MAX((yrgb_addr + size_yrgb), (uv_addr + size_uv)), (v_addr + size_v));\r
end = (end + (PAGE_SIZE - 1)) >> PAGE_SHIFT;\r
pageCount = end - start;\r
break;\r
- #if 0 \r
- case RK_FORMAT_BPP1 : \r
+ #if 0\r
+ case RK_FORMAT_BPP1 :\r
break;\r
case RK_FORMAT_BPP2 :\r
break;\r
break;\r
case RK_FORMAT_BPP8 :\r
break;\r
- #endif \r
+ #endif\r
default :\r
pageCount = 0;\r
start = 0;\r
}\r
\r
*StartAddr = start;\r
- return pageCount; \r
+ return pageCount;\r
}\r
\r
-static int rga_MapUserMemory(struct page **pages, \r
- uint32_t *pageTable, \r
- uint32_t Memory, \r
+static int rga_MapUserMemory(struct page **pages,\r
+ uint32_t *pageTable,\r
+ unsigned long Memory,\r
uint32_t pageCount)\r
{\r
int32_t result;\r
uint32_t i;\r
uint32_t status;\r
- uint32_t Address;\r
- uint32_t t_mem;\r
+ unsigned long Address;\r
+\r
status = 0;\r
+ Address = 0;\r
\r
- do\r
- { \r
+ do {\r
down_read(¤t->mm->mmap_sem);\r
result = get_user_pages(current,\r
current->mm,\r
);\r
up_read(¤t->mm->mmap_sem);\r
\r
- if(result <= 0 || result < pageCount) \r
+ #if 0\r
+ if(result <= 0 || result < pageCount)\r
+ {\r
+ status = 0;\r
+\r
+ for(i=0; i<pageCount; i++)\r
+ {\r
+ temp = armv7_va_to_pa((Memory + i) << PAGE_SHIFT);\r
+ if (temp == 0xffffffff)\r
+ {\r
+ printk("rga find mmu phy ddr error\n ");\r
+ status = RGA_OUT_OF_RESOURCES;\r
+ break;\r
+ }\r
+\r
+ pageTable[i] = temp;\r
+ }\r
+\r
+ return status;\r
+ }\r
+ #else\r
+ if(result <= 0 || result < pageCount)\r
{\r
struct vm_area_struct *vma;\r
\r
+ if (result>0) {\r
+ down_read(¤t->mm->mmap_sem);\r
+ for (i = 0; i < result; i++)\r
+ put_page(pages[i]);\r
+ up_read(¤t->mm->mmap_sem);\r
+ }\r
+\r
for(i=0; i<pageCount; i++)\r
{\r
- t_mem = (Memory + i) << PAGE_SHIFT;\r
- \r
- vma = find_vma(current->mm, t_mem);\r
+ vma = find_vma(current->mm, (Memory + i) << PAGE_SHIFT);\r
\r
- if (vma && (vma->vm_flags & VM_PFNMAP) )\r
+ if (vma)//&& (vma->vm_flags & VM_PFNMAP) )\r
{\r
do\r
{\r
pte_t * pte;\r
spinlock_t * ptl;\r
- unsigned long pfn; \r
+ unsigned long pfn;\r
+ pgd_t * pgd;\r
+ pud_t * pud;\r
+\r
+ pgd = pgd_offset(current->mm, (Memory + i) << PAGE_SHIFT);\r
+\r
+ if(pgd_val(*pgd) == 0)\r
+ {\r
+ //printk("rga pgd value is zero \n");\r
+ break;\r
+ }\r
\r
- pgd_t * pgd = pgd_offset(current->mm, t_mem);\r
- pud_t * pud = pud_offset(pgd, t_mem);\r
+ pud = pud_offset(pgd, (Memory + i) << PAGE_SHIFT);\r
if (pud)\r
{\r
- pmd_t * pmd = pmd_offset(pud, t_mem);\r
+ pmd_t * pmd = pmd_offset(pud, (Memory + i) << PAGE_SHIFT);\r
if (pmd)\r
{\r
- pte = pte_offset_map_lock(current->mm, pmd, t_mem, &ptl);\r
+ pte = pte_offset_map_lock(current->mm, pmd, (Memory + i) << PAGE_SHIFT, &ptl);\r
if (!pte)\r
{\r
+ pte_unmap_unlock(pte, ptl);\r
break;\r
}\r
}\r
}\r
\r
pfn = pte_pfn(*pte);\r
- Address = ((pfn << PAGE_SHIFT) | (((unsigned long)t_mem) & ~PAGE_MASK)); \r
- pte_unmap_unlock(pte, ptl); \r
+ Address = ((pfn << PAGE_SHIFT) | (((unsigned long)((Memory + i) << PAGE_SHIFT)) & ~PAGE_MASK));\r
+ pte_unmap_unlock(pte, ptl);\r
}\r
while (0);\r
\r
{\r
status = RGA_OUT_OF_RESOURCES;\r
break;\r
- } \r
+ }\r
}\r
\r
- return 0;\r
- }\r
-\r
- for (i = 0; i < pageCount; i++)\r
- {\r
- /* Flush the data cache. */\r
-#ifdef ANDROID\r
- dma_sync_single_for_device(\r
- NULL,\r
- page_to_phys(pages[i]),\r
- PAGE_SIZE,\r
- DMA_TO_DEVICE);\r
-#else\r
- flush_dcache_page(pages[i]);\r
-#endif\r
+ return status;\r
}\r
+ #endif\r
\r
/* Fill the page table. */\r
- for(i=0; i<pageCount; i++) \r
+ for(i=0; i<pageCount; i++)\r
{\r
/* Get the physical address from page struct. */\r
pageTable[i] = page_to_phys(pages[i]);\r
}\r
\r
+ down_read(¤t->mm->mmap_sem);\r
+ for (i = 0; i < result; i++)\r
+ put_page(pages[i]);\r
+ up_read(¤t->mm->mmap_sem);\r
+\r
return 0;\r
}\r
while(0);\r
\r
- if (rgaIS_ERROR(status))\r
- {\r
- /* Release page array. */\r
- if (result > 0 && pages != NULL)\r
- {\r
- for (i = 0; i < result; i++)\r
- {\r
- if (pages[i] == NULL)\r
- {\r
- break;\r
- }\r
-#ifdef ANDROID\r
- dma_sync_single_for_device(\r
- NULL,\r
- page_to_phys(pages[i]),\r
- PAGE_SIZE,\r
- DMA_FROM_DEVICE);\r
-#endif\r
- page_cache_release(pages[i]);\r
+ return status;\r
+}\r
+\r
+static int rga_MapION(struct sg_table *sg,\r
+ uint32_t *Memory,\r
+ int32_t pageCount,\r
+ uint32_t offset)\r
+{\r
+ uint32_t i;\r
+ uint32_t status;\r
+ unsigned long Address;\r
+ uint32_t mapped_size = 0;\r
+ uint32_t len = 0;\r
+ struct scatterlist *sgl = sg->sgl;\r
+ uint32_t sg_num = 0;\r
+\r
+ status = 0;\r
+ Address = 0;\r
+ offset = offset >> PAGE_SHIFT;\r
+ if (offset != 0) {\r
+ do {\r
+ len += (sg_dma_len(sgl) >> PAGE_SHIFT);\r
+ if (len == offset) {\r
+ sg_num += 1;\r
+ break;\r
+ }\r
+ else {\r
+ if (len > offset)\r
+ break;\r
+ }\r
+ sg_num += 1;\r
+ }\r
+ while((sgl = sg_next(sgl)) && (mapped_size < pageCount) && (sg_num < sg->nents));\r
+\r
+ sgl = sg->sgl;\r
+ len = 0;\r
+ do {\r
+ len += (sg_dma_len(sgl) >> PAGE_SHIFT);\r
+ sgl = sg_next(sgl);\r
+ }\r
+ while(--sg_num);\r
+\r
+ offset -= len;\r
+\r
+ len = sg_dma_len(sgl) >> PAGE_SHIFT;\r
+ Address = sg_phys(sgl);\r
+ Address += offset;\r
+\r
+ for(i=offset; i<len; i++) {\r
+ Memory[i - offset] = Address + (i << PAGE_SHIFT);\r
+ }\r
+ mapped_size += (len - offset);\r
+ sg_num = 1;\r
+ sgl = sg_next(sgl);\r
+ do {\r
+ len = sg_dma_len(sgl) >> PAGE_SHIFT;\r
+ Address = sg_phys(sgl);\r
+\r
+ for(i=0; i<len; i++) {\r
+ Memory[mapped_size + i] = Address + (i << PAGE_SHIFT);\r
}\r
+\r
+ mapped_size += len;\r
+ sg_num += 1;\r
}\r
+ while((sgl = sg_next(sgl)) && (mapped_size < pageCount) && (sg_num < sg->nents));\r
}\r
-\r
- return status;\r
+ else {\r
+ do {\r
+ len = sg_dma_len(sgl) >> PAGE_SHIFT;\r
+ Address = sg_phys(sgl);\r
+ for(i=0; i<len; i++) {\r
+ Memory[mapped_size + i] = Address + (i << PAGE_SHIFT);\r
+ }\r
+ mapped_size += len;\r
+ sg_num += 1;\r
+ }\r
+ while((sgl = sg_next(sgl)) && (mapped_size < pageCount) && (sg_num < sg->nents));\r
+ }\r
+ return 0;\r
}\r
\r
+\r
static int rga_mmu_info_BitBlt_mode(struct rga_reg *reg, struct rga_req *req)\r
-{ \r
- int SrcMemSize, DstMemSize, CMDMemSize;\r
- uint32_t SrcStart, DstStart, CMDStart; \r
+{\r
+ int SrcMemSize, DstMemSize;\r
+ unsigned long SrcStart, DstStart;\r
uint32_t i;\r
uint32_t AllSize;\r
- uint32_t *MMU_Base, *MMU_p;\r
+ uint32_t *MMU_Base, *MMU_p, *MMU_Base_phys;\r
int ret;\r
int status;\r
uint32_t uv_size, v_size;\r
struct page **pages = NULL;\r
\r
MMU_Base = NULL;\r
- \r
- do\r
- { \r
- /* cal src buf mmu info */ \r
+\r
+ SrcMemSize = 0;\r
+ DstMemSize = 0;\r
+\r
+ do {\r
+ /* cal src buf mmu info */\r
SrcMemSize = rga_buf_size_cal(req->src.yrgb_addr, req->src.uv_addr, req->src.v_addr,\r
- req->src.format, req->src.vir_w, req->src.vir_h,\r
+ req->src.format, req->src.vir_w, req->src.act_h + req->src.y_offset,\r
&SrcStart);\r
if(SrcMemSize == 0) {\r
- return -EINVAL; \r
+ return -EINVAL;\r
}\r
- \r
- /* cal dst buf mmu info */ \r
+\r
+ /* cal dst buf mmu info */\r
+\r
DstMemSize = rga_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,\r
req->dst.format, req->dst.vir_w, req->dst.vir_h,\r
- &DstStart); \r
- if(DstMemSize == 0) {\r
- return -EINVAL; \r
- }\r
- \r
- CMDMemSize = 0;\r
- /* cal cmd buf mmu info */\r
- CMDMemSize = rga_mem_size_cal((uint32_t)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);\r
- if(CMDMemSize == 0) {\r
- return -EINVAL; \r
- }\r
- \r
+ &DstStart);\r
+ if(DstMemSize == 0)\r
+ return -EINVAL;\r
+\r
/* Cal out the needed mem size */\r
- AllSize = SrcMemSize + DstMemSize + CMDMemSize;\r
- \r
- pages = (struct page **)kmalloc((AllSize + 1)* sizeof(struct page *), GFP_KERNEL);\r
- if(pages == NULL) {\r
- pr_err("RGA MMU malloc pages mem failed\n");\r
- status = RGA_MALLOC_ERROR;\r
- break; \r
- }\r
- \r
- MMU_Base = (uint32_t *)kmalloc((AllSize + 1) * sizeof(uint32_t), GFP_KERNEL); \r
- if(MMU_Base == NULL) {\r
- pr_err("RGA MMU malloc MMU_Base point failed\n");\r
+ SrcMemSize = (SrcMemSize + 15) & (~15);\r
+ DstMemSize = (DstMemSize + 15) & (~15);\r
+ AllSize = SrcMemSize + DstMemSize;\r
+\r
+ if (rga_mmu_buf_get_try(&rga_mmu_buf, AllSize + 16)) {\r
+ pr_err("RGA Get MMU mem failed\n");\r
status = RGA_MALLOC_ERROR;\r
- break; \r
+ break;\r
}\r
\r
- for(i=0; i<CMDMemSize; i++) {\r
- MMU_Base[i] = (uint32_t)virt_to_phys((uint32_t *)((CMDStart + i) << PAGE_SHIFT)); \r
- }\r
+ mutex_lock(&rga_service.lock);\r
+ MMU_Base = rga_mmu_buf.buf_virtual + (rga_mmu_buf.front & (rga_mmu_buf.size - 1));\r
+ MMU_Base_phys = rga_mmu_buf.buf + (rga_mmu_buf.front & (rga_mmu_buf.size - 1));\r
+ mutex_unlock(&rga_service.lock);\r
\r
- if(req->src.yrgb_addr < KERNEL_SPACE_VALID)\r
- { \r
- ret = rga_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], SrcStart, SrcMemSize);\r
- if (ret < 0) {\r
- pr_err("rga map src memory failed\n");\r
- status = ret;\r
- break;\r
- } \r
+ pages = rga_mmu_buf.pages;\r
+\r
+ if((req->mmu_info.mmu_flag >> 8) & 1) {\r
+ if (req->sg_src) {\r
+ ret = rga_MapION(req->sg_src, &MMU_Base[0], SrcMemSize, req->line_draw_info.flag);\r
+ }\r
+ else {\r
+ ret = rga_MapUserMemory(&pages[0], &MMU_Base[0], SrcStart, SrcMemSize);\r
+ if (ret < 0) {\r
+ pr_err("rga map src memory failed\n");\r
+ status = ret;\r
+ break;\r
+ }\r
+ }\r
}\r
- else\r
- {\r
- MMU_p = MMU_Base + CMDMemSize;\r
- \r
- if(req->src.yrgb_addr == (uint32_t)rga_service.pre_scale_buf)\r
- {\r
- /* Down scale ratio over 2, Last prc */\r
- /* MMU table copy from pre scale table */\r
- \r
+ else {\r
+ MMU_p = MMU_Base;\r
+\r
+ if(req->src.yrgb_addr == (unsigned long)rga_service.pre_scale_buf) {\r
for(i=0; i<SrcMemSize; i++)\r
- {\r
MMU_p[i] = rga_service.pre_scale_buf[i];\r
- } \r
}\r
- else\r
- { \r
+ else {\r
for(i=0; i<SrcMemSize; i++)\r
- {\r
- MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((SrcStart + i) << PAGE_SHIFT));\r
- } \r
- } \r
- }\r
- \r
- if (req->dst.yrgb_addr < KERNEL_SPACE_VALID)\r
- { \r
- #if 0\r
- ktime_t start, end;\r
- start = ktime_get();\r
- #endif\r
- ret = rga_MapUserMemory(&pages[CMDMemSize + SrcMemSize], &MMU_Base[CMDMemSize + SrcMemSize], DstStart, DstMemSize);\r
- if (ret < 0) {\r
- pr_err("rga map dst memory failed\n");\r
- status = ret;\r
- break;\r
+ MMU_p[i] = (uint32_t)((SrcStart + i) << PAGE_SHIFT);\r
}\r
+ }\r
\r
- #if 0\r
- end = ktime_get();\r
- end = ktime_sub(end, start);\r
- printk("dst mmu map time = %d\n", (int)ktime_to_us(end));\r
- #endif\r
+ if ((req->mmu_info.mmu_flag >> 10) & 1) {\r
+ if (req->sg_dst) {\r
+ ret = rga_MapION(req->sg_dst, &MMU_Base[SrcMemSize], DstMemSize, req->line_draw_info.line_width);\r
+ }\r
+ else {\r
+ ret = rga_MapUserMemory(&pages[SrcMemSize], &MMU_Base[SrcMemSize], DstStart, DstMemSize);\r
+ if (ret < 0) {\r
+ pr_err("rga map dst memory failed\n");\r
+ status = ret;\r
+ break;\r
+ }\r
+ }\r
}\r
- else\r
- {\r
- MMU_p = MMU_Base + CMDMemSize + SrcMemSize;\r
- \r
+ else {\r
+ MMU_p = MMU_Base + SrcMemSize;\r
for(i=0; i<DstMemSize; i++)\r
- {\r
- MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((DstStart + i) << PAGE_SHIFT));\r
- } \r
+ MMU_p[i] = (uint32_t)((DstStart + i) << PAGE_SHIFT);\r
}\r
\r
- /* zsq \r
- * change the buf address in req struct \r
+ MMU_Base[AllSize] = MMU_Base[AllSize-1];\r
+\r
+ /* zsq\r
+ * change the buf address in req struct\r
*/\r
- \r
- req->mmu_info.base_addr = (virt_to_phys(MMU_Base)>>2);\r
+\r
+ req->mmu_info.base_addr = (unsigned long)MMU_Base_phys >> 2;\r
\r
uv_size = (req->src.uv_addr - (SrcStart << PAGE_SHIFT)) >> PAGE_SHIFT;\r
v_size = (req->src.v_addr - (SrcStart << PAGE_SHIFT)) >> PAGE_SHIFT;\r
- \r
- req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);\r
- req->src.uv_addr = (req->src.uv_addr & (~PAGE_MASK)) | ((CMDMemSize + uv_size) << PAGE_SHIFT);\r
- req->src.v_addr = (req->src.v_addr & (~PAGE_MASK)) | ((CMDMemSize + v_size) << PAGE_SHIFT);\r
\r
- req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((CMDMemSize + SrcMemSize) << PAGE_SHIFT);\r
- \r
- /*record the malloc buf for the cmd end to release*/\r
- reg->MMU_base = MMU_Base;\r
- \r
+ req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK));\r
+ req->src.uv_addr = (req->src.uv_addr & (~PAGE_MASK)) | (uv_size << PAGE_SHIFT);\r
+ req->src.v_addr = (req->src.v_addr & (~PAGE_MASK)) | (v_size << PAGE_SHIFT);\r
+\r
+ uv_size = (req->dst.uv_addr - (DstStart << PAGE_SHIFT)) >> PAGE_SHIFT;\r
+\r
+ req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | (SrcMemSize << PAGE_SHIFT);\r
+ req->dst.uv_addr = (req->dst.uv_addr & (~PAGE_MASK)) | ((SrcMemSize + uv_size) << PAGE_SHIFT);\r
+\r
/* flush data to DDR */\r
- dmac_flush_range(MMU_Base, (MMU_Base + AllSize));\r
- outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));\r
+ #ifdef CONFIG_ARM\r
+ dmac_flush_range(MMU_Base, (MMU_Base + AllSize + 1));\r
+ outer_flush_range(virt_to_phys(MMU_Base), virt_to_phys(MMU_Base + AllSize + 1));\r
+ #elif defined(CONFIG_ARM64)\r
+ __dma_flush_range(MMU_Base, (MMU_Base + AllSize + 1));\r
+ #endif\r
+\r
+ rga_mmu_buf_get(&rga_mmu_buf, AllSize + 16);\r
+ reg->MMU_len = AllSize + 16;\r
\r
status = 0;\r
- \r
- /* Free the page table */ \r
- if (pages != NULL) {\r
- kfree(pages);\r
- }\r
\r
return status;\r
}\r
while(0);\r
\r
- \r
- /* Free the page table */ \r
- if (pages != NULL) {\r
- kfree(pages);\r
- }\r
-\r
- /* Free MMU table */\r
- if(MMU_Base != NULL) {\r
- kfree(MMU_Base);\r
- }\r
-\r
return status;\r
}\r
\r
static int rga_mmu_info_color_palette_mode(struct rga_reg *reg, struct rga_req *req)\r
{\r
int SrcMemSize, DstMemSize, CMDMemSize;\r
- uint32_t SrcStart, DstStart, CMDStart;\r
+ unsigned long SrcStart, DstStart, CMDStart;\r
struct page **pages = NULL;\r
uint32_t i;\r
uint32_t AllSize;\r
- uint32_t *MMU_Base = NULL;\r
+ uint32_t *MMU_Base = NULL, *MMU_Base_phys = NULL;\r
uint32_t *MMU_p;\r
int ret, status;\r
uint32_t stride;\r
\r
uint8_t shift;\r
uint16_t sw, byte_num;\r
- \r
+\r
shift = 3 - (req->palette_mode & 3);\r
sw = req->src.vir_w;\r
byte_num = sw >> shift;\r
stride = (byte_num + 3) & (~3);\r
\r
- do\r
- {\r
- \r
+ do {\r
SrcMemSize = rga_mem_size_cal(req->src.yrgb_addr, stride, &SrcStart);\r
if(SrcMemSize == 0) {\r
- return -EINVAL; \r
+ return -EINVAL;\r
}\r
\r
DstMemSize = rga_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,\r
req->dst.format, req->dst.vir_w, req->dst.vir_h,\r
&DstStart);\r
if(DstMemSize == 0) {\r
- return -EINVAL; \r
+ return -EINVAL;\r
}\r
\r
- CMDMemSize = rga_mem_size_cal((uint32_t)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);\r
+ CMDMemSize = rga_mem_size_cal((unsigned long)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);\r
if(CMDMemSize == 0) {\r
- return -EINVAL; \r
+ return -EINVAL;\r
}\r
\r
+ SrcMemSize = (SrcMemSize + 15) & (~15);\r
+ DstMemSize = (DstMemSize + 15) & (~15);\r
+ CMDMemSize = (CMDMemSize + 15) & (~15);\r
+\r
AllSize = SrcMemSize + DstMemSize + CMDMemSize;\r
- \r
- pages = (struct page **)kmalloc(AllSize * sizeof(struct page *), GFP_KERNEL);\r
- if(pages == NULL) {\r
- pr_err("RGA MMU malloc pages mem failed\n");\r
- return -EINVAL; \r
- }\r
\r
- MMU_Base = (uint32_t *)kmalloc(AllSize * sizeof(uint32_t), GFP_KERNEL);\r
- if(MMU_Base == NULL) {\r
- pr_err("RGA MMU malloc MMU_Base point failed\n");\r
- break; \r
+ if (rga_mmu_buf_get_try(&rga_mmu_buf, AllSize + 16)) {\r
+ pr_err("RGA Get MMU mem failed\n");\r
+ status = RGA_MALLOC_ERROR;\r
+ break;\r
}\r
\r
+ mutex_lock(&rga_service.lock);\r
+ MMU_Base = rga_mmu_buf.buf_virtual + (rga_mmu_buf.front & (rga_mmu_buf.size - 1));\r
+ MMU_Base_phys = rga_mmu_buf.buf + (rga_mmu_buf.front & (rga_mmu_buf.size - 1));\r
+ mutex_unlock(&rga_service.lock);\r
+\r
+ pages = rga_mmu_buf.pages;\r
+\r
/* map CMD addr */\r
- for(i=0; i<CMDMemSize; i++) \r
- {\r
- MMU_Base[i] = virt_to_phys((uint32_t *)((CMDStart + i)<<PAGE_SHIFT));\r
+ for(i=0; i<CMDMemSize; i++) {\r
+ MMU_Base[i] = (uint32_t)virt_to_phys((uint32_t *)((CMDStart + i)<<PAGE_SHIFT));\r
}\r
\r
/* map src addr */\r
- if (req->src.yrgb_addr < KERNEL_SPACE_VALID) \r
- { \r
+ if (req->src.yrgb_addr < KERNEL_SPACE_VALID) {\r
ret = rga_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], SrcStart, SrcMemSize);\r
- if (ret < 0) \r
- {\r
+ if (ret < 0) {\r
pr_err("rga map src memory failed\n");\r
status = ret;\r
- break; \r
+ break;\r
}\r
}\r
- else\r
- {\r
+ else {\r
MMU_p = MMU_Base + CMDMemSize;\r
- \r
+\r
for(i=0; i<SrcMemSize; i++)\r
{\r
MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((SrcStart + i) << PAGE_SHIFT));\r
}\r
\r
/* map dst addr */\r
- if (req->src.yrgb_addr < KERNEL_SPACE_VALID) \r
- {\r
+ if (req->src.yrgb_addr < KERNEL_SPACE_VALID) {\r
ret = rga_MapUserMemory(&pages[CMDMemSize + SrcMemSize], &MMU_Base[CMDMemSize + SrcMemSize], DstStart, DstMemSize);\r
- if (ret < 0) \r
- {\r
+ if (ret < 0) {\r
pr_err("rga map dst memory failed\n");\r
status = ret;\r
break;\r
}\r
}\r
- else\r
- {\r
+ else {\r
MMU_p = MMU_Base + CMDMemSize + SrcMemSize;\r
- \r
for(i=0; i<DstMemSize; i++)\r
- {\r
MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((DstStart + i) << PAGE_SHIFT));\r
- }\r
}\r
- \r
\r
- /* zsq \r
+\r
+ /* zsq\r
* change the buf address in req struct\r
- * for the reason of lie to MMU \r
+ * for the reason of lie to MMU\r
*/\r
- req->mmu_info.base_addr = (virt_to_phys(MMU_Base)>>2); \r
+ req->mmu_info.base_addr = (virt_to_phys(MMU_Base)>>2);\r
req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);\r
req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((CMDMemSize + SrcMemSize) << PAGE_SHIFT);\r
\r
-\r
/*record the malloc buf for the cmd end to release*/\r
reg->MMU_base = MMU_Base;\r
\r
/* flush data to DDR */\r
- dmac_flush_range(MMU_Base, (MMU_Base + AllSize));\r
- outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));\r
+ #ifdef CONFIG_ARM\r
+ dmac_flush_range(MMU_Base, (MMU_Base + AllSize + 1));\r
+ outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize + 1));\r
+ #elif defined(CONFIG_ARM64)\r
+ __dma_flush_range(MMU_Base, (MMU_Base + AllSize + 1));\r
+ #endif\r
\r
- /* Free the page table */\r
- if (pages != NULL) { \r
- kfree(pages);\r
- }\r
+ rga_mmu_buf_get(&rga_mmu_buf, AllSize + 16);\r
+ reg->MMU_len = AllSize + 16;\r
\r
return status;\r
\r
}\r
while(0);\r
\r
- /* Free the page table */\r
- if (pages != NULL) { \r
- kfree(pages);\r
- }\r
-\r
- /* Free mmu table */\r
- if (MMU_Base != NULL) {\r
- kfree(MMU_Base);\r
- }\r
-\r
return 0;\r
}\r
\r
static int rga_mmu_info_color_fill_mode(struct rga_reg *reg, struct rga_req *req)\r
{\r
- int DstMemSize, CMDMemSize;\r
- uint32_t DstStart, CMDStart;\r
+ int DstMemSize;\r
+ unsigned long DstStart;\r
struct page **pages = NULL;\r
uint32_t i;\r
uint32_t AllSize;\r
- uint32_t *MMU_Base, *MMU_p;\r
+ uint32_t *MMU_Base, *MMU_p, *MMU_Base_phys;\r
int ret;\r
int status;\r
\r
MMU_Base = NULL;\r
\r
- do\r
- { \r
+ do {\r
DstMemSize = rga_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,\r
req->dst.format, req->dst.vir_w, req->dst.vir_h,\r
&DstStart);\r
if(DstMemSize == 0) {\r
- return -EINVAL; \r
+ return -EINVAL;\r
}\r
\r
- CMDMemSize = rga_mem_size_cal((uint32_t)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);\r
- if(CMDMemSize == 0) {\r
- return -EINVAL; \r
- }\r
+ AllSize = (DstMemSize + 15) & (~15);\r
\r
- AllSize = DstMemSize + CMDMemSize;\r
- \r
- pages = (struct page **)kmalloc(AllSize * sizeof(struct page *), GFP_KERNEL);\r
- if(pages == NULL) {\r
- pr_err("RGA MMU malloc pages mem failed\n");\r
- status = RGA_MALLOC_ERROR; \r
- break;\r
- }\r
- \r
- MMU_Base = (uint32_t *)kmalloc(AllSize * sizeof(uint32_t), GFP_KERNEL);\r
- if(pages == NULL) {\r
- pr_err("RGA MMU malloc MMU_Base point failed\n");\r
+ pages = rga_mmu_buf.pages;\r
+\r
+ if (rga_mmu_buf_get_try(&rga_mmu_buf, AllSize + 16)) {\r
+ pr_err("RGA Get MMU mem failed\n");\r
status = RGA_MALLOC_ERROR;\r
- break; \r
+ break;\r
}\r
\r
- for(i=0; i<CMDMemSize; i++) {\r
- MMU_Base[i] = virt_to_phys((uint32_t *)((CMDStart+i)<<PAGE_SHIFT));\r
- }\r
+ mutex_lock(&rga_service.lock);\r
+ MMU_Base = rga_mmu_buf.buf_virtual + (rga_mmu_buf.front & (rga_mmu_buf.size - 1));\r
+ MMU_Base_phys = rga_mmu_buf.buf + (rga_mmu_buf.front & (rga_mmu_buf.size - 1));\r
+ mutex_unlock(&rga_service.lock);\r
\r
- if (req->dst.yrgb_addr < KERNEL_SPACE_VALID) \r
- {\r
- ret = rga_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], DstStart, DstMemSize);\r
- if (ret < 0) {\r
- pr_err("rga map dst memory failed\n");\r
- status = ret;\r
- break;\r
+ if (req->dst.yrgb_addr < KERNEL_SPACE_VALID) {\r
+ if (req->sg_dst) {\r
+ ret = rga_MapION(req->sg_dst, &MMU_Base[0], DstMemSize, req->line_draw_info.line_width);\r
+ }\r
+ else {\r
+ ret = rga_MapUserMemory(&pages[0], &MMU_Base[0], DstStart, DstMemSize);\r
+ if (ret < 0) {\r
+ pr_err("rga map dst memory failed\n");\r
+ status = ret;\r
+ break;\r
+ }\r
}\r
}\r
- else\r
- {\r
- MMU_p = MMU_Base + CMDMemSize;\r
- \r
+ else {\r
+ MMU_p = MMU_Base;\r
for(i=0; i<DstMemSize; i++)\r
- {\r
- MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((DstStart + i) << PAGE_SHIFT));\r
- }\r
+ MMU_p[i] = (uint32_t)((DstStart + i) << PAGE_SHIFT);\r
}\r
- \r
- \r
- /* zsq \r
- * change the buf address in req struct \r
+\r
+ MMU_Base[AllSize] = MMU_Base[AllSize - 1];\r
+\r
+ /* zsq\r
+ * change the buf address in req struct\r
*/\r
- \r
- req->mmu_info.base_addr = (virt_to_phys(MMU_Base)>>2); \r
- req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((CMDMemSize) << PAGE_SHIFT);\r
- \r
+\r
+ req->mmu_info.base_addr = ((unsigned long)(MMU_Base_phys)>>2);\r
+ req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK));\r
+\r
/*record the malloc buf for the cmd end to release*/\r
reg->MMU_base = MMU_Base;\r
\r
/* flush data to DDR */\r
- dmac_flush_range(MMU_Base, (MMU_Base + AllSize));\r
- outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));\r
+ #ifdef CONFIG_ARM\r
+ dmac_flush_range(MMU_Base, (MMU_Base + AllSize + 1));\r
+ outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize + 1));\r
+ #elif defined(CONFIG_ARM64)\r
+ __dma_flush_range(MMU_Base, (MMU_Base + AllSize + 1));\r
+ #endif\r
\r
- /* Free the page table */\r
- if (pages != NULL) \r
- kfree(pages);\r
+ rga_mmu_buf_get(&rga_mmu_buf, AllSize + 16);\r
+ reg->MMU_len = AllSize + 16;\r
\r
return 0;\r
}\r
while(0);\r
\r
- if (pages != NULL) \r
- kfree(pages);\r
-\r
- if (MMU_Base != NULL)\r
- kfree(MMU_Base);\r
- \r
return status;\r
}\r
\r
\r
static int rga_mmu_info_line_point_drawing_mode(struct rga_reg *reg, struct rga_req *req)\r
{\r
- int DstMemSize, CMDMemSize;\r
- uint32_t DstStart, CMDStart;\r
+ return 0;\r
+}\r
+\r
+static int rga_mmu_info_blur_sharp_filter_mode(struct rga_reg *reg, struct rga_req *req)\r
+{\r
+ return 0;\r
+}\r
+\r
+\r
+\r
+static int rga_mmu_info_pre_scale_mode(struct rga_reg *reg, struct rga_req *req)\r
+{\r
+ int SrcMemSize, DstMemSize;\r
+ unsigned long SrcStart, DstStart;\r
struct page **pages = NULL;\r
uint32_t i;\r
uint32_t AllSize;\r
- uint32_t *MMU_Base, *MMU_p;\r
- int ret, status;\r
-\r
- MMU_Base = NULL;\r
-\r
- do\r
- { \r
- /* cal dst buf mmu info */ \r
- DstMemSize = rga_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,\r
- req->dst.format, req->dst.vir_w, req->dst.vir_h,\r
- &DstStart);\r
- if(DstMemSize == 0) {\r
- return -EINVAL; \r
- }\r
-\r
- CMDMemSize = rga_mem_size_cal((uint32_t)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);\r
- if(CMDMemSize == 0) {\r
- return -EINVAL; \r
- }\r
-\r
- AllSize = DstMemSize + CMDMemSize;\r
- \r
- pages = (struct page **)kmalloc(AllSize * sizeof(struct page *), GFP_KERNEL);\r
- if(pages == NULL) {\r
- pr_err("RGA MMU malloc pages mem failed\n");\r
- status = RGA_MALLOC_ERROR;\r
- break;\r
- }\r
- \r
- MMU_Base = (uint32_t *)kmalloc(AllSize * sizeof(uint32_t), GFP_KERNEL);\r
- if(pages == NULL) {\r
- pr_err("RGA MMU malloc MMU_Base point failed\n");\r
- status = RGA_MALLOC_ERROR;\r
- break;\r
- }\r
-\r
- for(i=0; i<CMDMemSize; i++) {\r
- MMU_Base[i] = virt_to_phys((uint32_t *)((CMDStart+i)<<PAGE_SHIFT));\r
- }\r
-\r
- if (req->dst.yrgb_addr < KERNEL_SPACE_VALID)\r
- {\r
- ret = rga_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], DstStart, DstMemSize);\r
- if (ret < 0) {\r
- pr_err("rga map dst memory failed\n");\r
- status = ret;\r
- break;\r
- }\r
- }\r
- else\r
- {\r
- MMU_p = MMU_Base + CMDMemSize;\r
- \r
- for(i=0; i<DstMemSize; i++)\r
- {\r
- MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((DstStart + i) << PAGE_SHIFT));\r
- }\r
- }\r
-\r
- /* zsq \r
- * change the buf address in req struct\r
- * for the reason of lie to MMU \r
- */\r
- req->mmu_info.base_addr = (virt_to_phys(MMU_Base) >> 2); \r
- req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((CMDMemSize) << PAGE_SHIFT);\r
- \r
- \r
- /*record the malloc buf for the cmd end to release*/\r
- reg->MMU_base = MMU_Base;\r
-\r
- /* flush data to DDR */\r
- dmac_flush_range(MMU_Base, (MMU_Base + AllSize));\r
- outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));\r
-\r
- /* Free the page table */\r
- if (pages != NULL) { \r
- kfree(pages);\r
- } \r
-\r
- return 0;\r
-\r
- }\r
- while(0);\r
-\r
- if (pages != NULL)\r
- kfree(pages);\r
-\r
- if (MMU_Base != NULL)\r
- kfree(MMU_Base);\r
-\r
- return status;\r
-}\r
-\r
-static int rga_mmu_info_blur_sharp_filter_mode(struct rga_reg *reg, struct rga_req *req)\r
-{\r
- int SrcMemSize, DstMemSize, CMDMemSize;\r
- uint32_t SrcStart, DstStart, CMDStart;\r
- struct page **pages = NULL;\r
- uint32_t i;\r
- uint32_t AllSize;\r
- uint32_t *MMU_Base, *MMU_p;\r
- int ret, status;\r
- uint32_t uv_size, v_size;\r
-\r
- MMU_Base = NULL;\r
- \r
- do\r
- {\r
- /* cal src buf mmu info */ \r
- SrcMemSize = rga_buf_size_cal(req->src.yrgb_addr, req->src.uv_addr, req->src.v_addr,\r
- req->src.format, req->src.vir_w, req->src.vir_h,\r
- &SrcStart);\r
- if(SrcMemSize == 0) {\r
- return -EINVAL; \r
- }\r
-\r
- /* cal dst buf mmu info */ \r
- DstMemSize = rga_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,\r
- req->dst.format, req->dst.vir_w, req->dst.vir_h,\r
- &DstStart);\r
- if(DstMemSize == 0) {\r
- return -EINVAL; \r
- }\r
-\r
- /* cal cmd buf mmu info */\r
- CMDMemSize = rga_mem_size_cal((uint32_t)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);\r
- if(CMDMemSize == 0) {\r
- return -EINVAL; \r
- }\r
-\r
- AllSize = SrcMemSize + DstMemSize + CMDMemSize;\r
- \r
- pages = (struct page **)kmalloc(AllSize * sizeof(struct page *), GFP_KERNEL);\r
- if(pages == NULL) {\r
- pr_err("RGA MMU malloc pages mem failed\n");\r
- status = RGA_MALLOC_ERROR;\r
- break; \r
- }\r
- \r
- MMU_Base = (uint32_t *)kmalloc(AllSize * sizeof(uint32_t), GFP_KERNEL);\r
- if(pages == NULL) {\r
- pr_err("RGA MMU malloc MMU_Base point failed\n");\r
- status = RGA_MALLOC_ERROR;\r
- break; \r
- }\r
-\r
- for(i=0; i<CMDMemSize; i++) {\r
- MMU_Base[i] = virt_to_phys((uint32_t *)((CMDStart + i)<< PAGE_SHIFT));\r
- }\r
-\r
- if (req->src.yrgb_addr < KERNEL_SPACE_VALID)\r
- {\r
- ret = rga_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], SrcStart, SrcMemSize);\r
- if (ret < 0) \r
- {\r
- pr_err("rga map src memory failed\n");\r
- status = ret;\r
- break;\r
- }\r
- }\r
- else\r
- {\r
- MMU_p = MMU_Base + CMDMemSize;\r
- \r
- for(i=0; i<SrcMemSize; i++)\r
- {\r
- MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((SrcStart + i) << PAGE_SHIFT));\r
- } \r
- }\r
-\r
- \r
- if (req->dst.yrgb_addr < KERNEL_SPACE_VALID)\r
- {\r
- ret = rga_MapUserMemory(&pages[CMDMemSize + SrcMemSize], &MMU_Base[CMDMemSize + SrcMemSize], DstStart, DstMemSize);\r
- if (ret < 0) \r
- {\r
- pr_err("rga map dst memory failed\n");\r
- status = ret;\r
- break;\r
- }\r
- }\r
- else\r
- {\r
- MMU_p = MMU_Base + CMDMemSize + SrcMemSize;\r
- \r
- for(i=0; i<DstMemSize; i++)\r
- {\r
- MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((DstStart + i) << PAGE_SHIFT));\r
- }\r
- }\r
-\r
- /* zsq \r
- * change the buf address in req struct\r
- * for the reason of lie to MMU \r
- */\r
- req->mmu_info.base_addr = (virt_to_phys(MMU_Base) >> 2);\r
-\r
- uv_size = (req->src.uv_addr - (SrcStart << PAGE_SHIFT)) >> PAGE_SHIFT;\r
- v_size = (req->src.v_addr - (SrcStart << PAGE_SHIFT)) >> PAGE_SHIFT;\r
- \r
- req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);\r
- req->src.uv_addr = (req->src.uv_addr & (~PAGE_MASK)) | ((CMDMemSize + uv_size) << PAGE_SHIFT);\r
- req->src.v_addr = (req->src.v_addr & (~PAGE_MASK)) | ((CMDMemSize + v_size) << PAGE_SHIFT);\r
-\r
- uv_size = (req->dst.uv_addr - (DstStart << PAGE_SHIFT)) >> PAGE_SHIFT;\r
- v_size = (req->dst.v_addr - (DstStart << PAGE_SHIFT)) >> PAGE_SHIFT;\r
-\r
- req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((CMDMemSize + SrcMemSize) << PAGE_SHIFT);\r
- req->dst.uv_addr = (req->dst.uv_addr & (~PAGE_MASK)) | ((CMDMemSize + SrcMemSize + uv_size) << PAGE_SHIFT);\r
- req->dst.v_addr = (req->dst.v_addr & (~PAGE_MASK)) | ((CMDMemSize + SrcMemSize + v_size) << PAGE_SHIFT);\r
- \r
- \r
- /*record the malloc buf for the cmd end to release*/\r
- reg->MMU_base = MMU_Base;\r
-\r
- /* flush data to DDR */\r
- dmac_flush_range(MMU_Base, (MMU_Base + AllSize));\r
- outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));\r
-\r
- /* Free the page table */\r
- if (pages != NULL) { \r
- kfree(pages);\r
- } \r
-\r
- return 0;\r
- }\r
- while(0);\r
-\r
- if (pages != NULL)\r
- kfree(pages);\r
-\r
- if (MMU_Base != NULL)\r
- kfree(MMU_Base);\r
-\r
- return status;\r
-}\r
-\r
-\r
-\r
-static int rga_mmu_info_pre_scale_mode(struct rga_reg *reg, struct rga_req *req)\r
-{\r
- int SrcMemSize, DstMemSize, CMDMemSize;\r
- uint32_t SrcStart, DstStart, CMDStart;\r
- struct page **pages = NULL;\r
- uint32_t i;\r
- uint32_t AllSize;\r
- uint32_t *MMU_Base, *MMU_p;\r
+ uint32_t *MMU_Base, *MMU_p, *MMU_Base_phys;\r
int ret;\r
int status;\r
uint32_t uv_size, v_size;\r
\r
MMU_Base = NULL;\r
\r
- do\r
- {\r
- /* cal src buf mmu info */ \r
+ do {\r
+ /* cal src buf mmu info */\r
SrcMemSize = rga_buf_size_cal(req->src.yrgb_addr, req->src.uv_addr, req->src.v_addr,\r
req->src.format, req->src.vir_w, req->src.vir_h,\r
&SrcStart);\r
if(SrcMemSize == 0) {\r
- return -EINVAL; \r
+ return -EINVAL;\r
}\r
\r
- /* cal dst buf mmu info */ \r
+ /* cal dst buf mmu info */\r
DstMemSize = rga_buf_size_cal(req->dst.yrgb_addr, req->dst.uv_addr, req->dst.v_addr,\r
req->dst.format, req->dst.vir_w, req->dst.vir_h,\r
&DstStart);\r
if(DstMemSize == 0) {\r
- return -EINVAL; \r
+ return -EINVAL;\r
}\r
\r
- /* cal cmd buf mmu info */\r
- CMDMemSize = rga_mem_size_cal((uint32_t)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);\r
- if(CMDMemSize == 0) {\r
- return -EINVAL; \r
- }\r
+ SrcMemSize = (SrcMemSize + 15) & (~15);\r
+ DstMemSize = (DstMemSize + 15) & (~15);\r
\r
- AllSize = SrcMemSize + DstMemSize + CMDMemSize;\r
- \r
- pages = (struct page **)kmalloc((AllSize)* sizeof(struct page *), GFP_KERNEL);\r
- if(pages == NULL) \r
- {\r
- pr_err("RGA MMU malloc pages mem failed\n");\r
- status = RGA_MALLOC_ERROR;\r
- break; \r
- }\r
+ AllSize = SrcMemSize + DstMemSize;\r
\r
- /* \r
- * Allocate MMU Index mem\r
- * This mem release in run_to_done fun \r
- */\r
- MMU_Base = (uint32_t *)kmalloc((AllSize + 1) * sizeof(uint32_t), GFP_KERNEL);\r
- if(pages == NULL) {\r
- pr_err("RGA MMU malloc MMU_Base point failed\n");\r
- status = RGA_MALLOC_ERROR; \r
- break; \r
- }\r
+ pages = rga_mmu_buf.pages;\r
\r
- for(i=0; i<CMDMemSize; i++) {\r
- MMU_Base[i] = virt_to_phys((uint32_t *)((CMDStart + i) << PAGE_SHIFT));\r
+ if (rga_mmu_buf_get_try(&rga_mmu_buf, AllSize + 16)) {\r
+ pr_err("RGA Get MMU mem failed\n");\r
+ status = RGA_MALLOC_ERROR;\r
+ break;\r
}\r
\r
+ mutex_lock(&rga_service.lock);\r
+ MMU_Base = rga_mmu_buf.buf_virtual + (rga_mmu_buf.front & (rga_mmu_buf.size - 1));\r
+ MMU_Base_phys = rga_mmu_buf.buf + (rga_mmu_buf.front & (rga_mmu_buf.size - 1));\r
+ mutex_unlock(&rga_service.lock);\r
\r
/* map src pages */\r
- if (req->src.yrgb_addr < KERNEL_SPACE_VALID)\r
- {\r
- ret = rga_MapUserMemory(&pages[CMDMemSize], &MMU_Base[CMDMemSize], SrcStart, SrcMemSize);\r
- if (ret < 0) {\r
- pr_err("rga map src memory failed\n");\r
- status = ret;\r
- break;\r
+ if ((req->mmu_info.mmu_flag >> 8) & 1) {\r
+ if (req->sg_src) {\r
+ ret = rga_MapION(req->sg_src, &MMU_Base[0], SrcMemSize,req->line_draw_info.flag);\r
+ }\r
+ else {\r
+ ret = rga_MapUserMemory(&pages[0], &MMU_Base[0], SrcStart, SrcMemSize);\r
+ if (ret < 0) {\r
+ pr_err("rga map src memory failed\n");\r
+ status = ret;\r
+ break;\r
+ }\r
}\r
}\r
- else\r
- {\r
- MMU_p = MMU_Base + CMDMemSize;\r
- \r
+ else {\r
+ MMU_p = MMU_Base;\r
+\r
for(i=0; i<SrcMemSize; i++)\r
- {\r
- MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((SrcStart + i) << PAGE_SHIFT));\r
- } \r
+ MMU_p[i] = (uint32_t)((SrcStart + i) << PAGE_SHIFT);\r
}\r
\r
- \r
- if(req->dst.yrgb_addr >= KERNEL_SPACE_VALID) \r
- { \r
+ if((req->mmu_info.mmu_flag >> 10) & 1) {\r
+ if (req->sg_dst) {\r
+ ret = rga_MapION(req->sg_dst, &MMU_Base[SrcMemSize], DstMemSize, req->line_draw_info.line_width);\r
+ }\r
+ else {\r
+ ret = rga_MapUserMemory(&pages[SrcMemSize], &MMU_Base[SrcMemSize], DstStart, DstMemSize);\r
+ if (ret < 0) {\r
+ pr_err("rga map dst memory failed\n");\r
+ status = ret;\r
+ break;\r
+ }\r
+ }\r
+ }\r
+ else\r
+ {\r
/* kernel space */\r
- MMU_p = MMU_Base + CMDMemSize + SrcMemSize;\r
+ MMU_p = MMU_Base + SrcMemSize;\r
\r
- if(req->dst.yrgb_addr == (uint32_t)rga_service.pre_scale_buf)\r
- {\r
+ if(req->dst.yrgb_addr == (unsigned long)rga_service.pre_scale_buf) {\r
for(i=0; i<DstMemSize; i++)\r
- {\r
MMU_p[i] = rga_service.pre_scale_buf[i];\r
- }\r
}\r
- else\r
- {\r
- for(i=0; i<DstMemSize; i++) \r
- {\r
- MMU_p[i] = virt_to_phys((uint32_t *)((DstStart + i)<< PAGE_SHIFT)); \r
- } \r
- } \r
- }\r
- else \r
- {\r
- /* user space */\r
- ret = rga_MapUserMemory(&pages[CMDMemSize + SrcMemSize], &MMU_Base[CMDMemSize + SrcMemSize], DstStart, DstMemSize);\r
- if (ret < 0) \r
- {\r
- pr_err("rga map dst memory failed\n");\r
- status = ret;\r
- break;\r
- } \r
+ else {\r
+ for(i=0; i<DstMemSize; i++)\r
+ MMU_p[i] = (uint32_t)((DstStart + i) << PAGE_SHIFT);\r
+ }\r
}\r
\r
- /* zsq \r
+ MMU_Base[AllSize] = MMU_Base[AllSize];\r
+\r
+ /* zsq\r
* change the buf address in req struct\r
- * for the reason of lie to MMU \r
+ * for the reason of lie to MMU\r
*/\r
- \r
- req->mmu_info.base_addr = (virt_to_phys(MMU_Base)>>2);\r
+\r
+ req->mmu_info.base_addr = ((unsigned long)(MMU_Base_phys)>>2);\r
\r
uv_size = (req->src.uv_addr - (SrcStart << PAGE_SHIFT)) >> PAGE_SHIFT;\r
v_size = (req->src.v_addr - (SrcStart << PAGE_SHIFT)) >> PAGE_SHIFT;\r
\r
- req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);\r
- req->src.uv_addr = (req->src.uv_addr & (~PAGE_MASK)) | ((CMDMemSize + uv_size) << PAGE_SHIFT);\r
- req->src.v_addr = (req->src.v_addr & (~PAGE_MASK)) | ((CMDMemSize + v_size) << PAGE_SHIFT);\r
+ req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK));\r
+ req->src.uv_addr = (req->src.uv_addr & (~PAGE_MASK)) | (uv_size << PAGE_SHIFT);\r
+ req->src.v_addr = (req->src.v_addr & (~PAGE_MASK)) | (v_size << PAGE_SHIFT);\r
\r
uv_size = (req->dst.uv_addr - (DstStart << PAGE_SHIFT)) >> PAGE_SHIFT;\r
v_size = (req->dst.v_addr - (DstStart << PAGE_SHIFT)) >> PAGE_SHIFT;\r
\r
- req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((CMDMemSize + SrcMemSize) << PAGE_SHIFT);\r
- req->dst.uv_addr = (req->dst.uv_addr & (~PAGE_MASK)) | ((CMDMemSize + SrcMemSize + uv_size) << PAGE_SHIFT);\r
- req->dst.v_addr = (req->dst.v_addr & (~PAGE_MASK)) | ((CMDMemSize + SrcMemSize + v_size) << PAGE_SHIFT);\r
+ req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((SrcMemSize) << PAGE_SHIFT);\r
+ req->dst.uv_addr = (req->dst.uv_addr & (~PAGE_MASK)) | ((SrcMemSize + uv_size) << PAGE_SHIFT);\r
+ req->dst.v_addr = (req->dst.v_addr & (~PAGE_MASK)) | ((SrcMemSize + v_size) << PAGE_SHIFT);\r
\r
/*record the malloc buf for the cmd end to release*/\r
reg->MMU_base = MMU_Base;\r
\r
/* flush data to DDR */\r
- dmac_flush_range(MMU_Base, (MMU_Base + AllSize));\r
- outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));\r
+ #ifdef CONFIG_ARM\r
+ dmac_flush_range(MMU_Base, (MMU_Base + AllSize + 1));\r
+ outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize + 1));\r
+ #elif defined(CONFIG_ARM64)\r
+ __dma_flush_range(MMU_Base, (MMU_Base + AllSize + 1));\r
+ #endif\r
\r
- /* Free the page table */\r
- if (pages != NULL) \r
- { \r
- kfree(pages);\r
- } \r
+ rga_mmu_buf_get(&rga_mmu_buf, AllSize + 16);\r
+ reg->MMU_len = AllSize + 16;\r
\r
return 0;\r
}\r
while(0);\r
\r
- if (pages != NULL)\r
- kfree(pages);\r
-\r
- if (MMU_Base != NULL)\r
- kfree(MMU_Base);\r
-\r
return status;\r
}\r
\r
static int rga_mmu_info_update_palette_table_mode(struct rga_reg *reg, struct rga_req *req)\r
{\r
int SrcMemSize, CMDMemSize;\r
- uint32_t SrcStart, CMDStart;\r
+ unsigned long SrcStart, CMDStart;\r
struct page **pages = NULL;\r
uint32_t i;\r
uint32_t AllSize;\r
\r
MMU_Base = NULL;\r
\r
- do\r
- { \r
- /* cal src buf mmu info */ \r
+ do {\r
+ /* cal src buf mmu info */\r
SrcMemSize = rga_mem_size_cal(req->src.yrgb_addr, req->src.vir_w * req->src.vir_h, &SrcStart);\r
if(SrcMemSize == 0) {\r
- return -EINVAL; \r
+ return -EINVAL;\r
}\r
\r
/* cal cmd buf mmu info */\r
- CMDMemSize = rga_mem_size_cal((uint32_t)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);\r
+ CMDMemSize = rga_mem_size_cal((unsigned long)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);\r
if(CMDMemSize == 0) {\r
- return -EINVAL; \r
+ return -EINVAL;\r
}\r
\r
AllSize = SrcMemSize + CMDMemSize;\r
- \r
- pages = (struct page **)kmalloc(AllSize * sizeof(struct page *), GFP_KERNEL);\r
+\r
+ pages = kzalloc(AllSize * sizeof(struct page *), GFP_KERNEL);\r
if(pages == NULL) {\r
pr_err("RGA MMU malloc pages mem failed\n");\r
status = RGA_MALLOC_ERROR;\r
- break; \r
+ break;\r
}\r
- \r
- MMU_Base = (uint32_t *)kmalloc((AllSize + 1)* sizeof(uint32_t), GFP_KERNEL);\r
+\r
+ MMU_Base = kzalloc((AllSize + 1)* sizeof(uint32_t), GFP_KERNEL);\r
if(pages == NULL) {\r
pr_err("RGA MMU malloc MMU_Base point failed\n");\r
status = RGA_MALLOC_ERROR;\r
- break; \r
+ break;\r
}\r
\r
for(i=0; i<CMDMemSize; i++) {\r
- MMU_Base[i] = virt_to_phys((uint32_t *)((CMDStart + i) << PAGE_SHIFT));\r
+ MMU_Base[i] = (uint32_t)virt_to_phys((uint32_t *)((CMDStart + i) << PAGE_SHIFT));\r
}\r
\r
if (req->src.yrgb_addr < KERNEL_SPACE_VALID)\r
else\r
{\r
MMU_p = MMU_Base + CMDMemSize;\r
- \r
+\r
for(i=0; i<SrcMemSize; i++)\r
{\r
MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((SrcStart + i) << PAGE_SHIFT));\r
- } \r
+ }\r
}\r
\r
- /* zsq \r
+ /* zsq\r
* change the buf address in req struct\r
- * for the reason of lie to MMU \r
+ * for the reason of lie to MMU\r
*/\r
req->mmu_info.base_addr = (virt_to_phys(MMU_Base) >> 2);\r
- \r
- req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT); \r
- \r
+\r
+ req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);\r
+\r
/*record the malloc buf for the cmd end to release*/\r
reg->MMU_base = MMU_Base;\r
\r
/* flush data to DDR */\r
+ #ifdef CONFIG_ARM\r
dmac_flush_range(MMU_Base, (MMU_Base + AllSize));\r
outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));\r
+ #elif defined(CONFIG_ARM64)\r
+ __dma_flush_range(MMU_Base, (MMU_Base + AllSize));\r
+ #endif\r
+\r
\r
if (pages != NULL) {\r
/* Free the page table */\r
kfree(pages);\r
- } \r
+ }\r
\r
return 0;\r
}\r
static int rga_mmu_info_update_patten_buff_mode(struct rga_reg *reg, struct rga_req *req)\r
{\r
int SrcMemSize, CMDMemSize;\r
- uint32_t SrcStart, CMDStart;\r
+ unsigned long SrcStart, CMDStart;\r
struct page **pages = NULL;\r
uint32_t i;\r
uint32_t AllSize;\r
do\r
{\r
\r
- /* cal src buf mmu info */ \r
+ /* cal src buf mmu info */\r
SrcMemSize = rga_mem_size_cal(req->pat.yrgb_addr, req->pat.vir_w * req->pat.vir_h * 4, &SrcStart);\r
if(SrcMemSize == 0) {\r
- return -EINVAL; \r
+ return -EINVAL;\r
}\r
\r
/* cal cmd buf mmu info */\r
- CMDMemSize = rga_mem_size_cal((uint32_t)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);\r
+ CMDMemSize = rga_mem_size_cal((unsigned long)rga_service.cmd_buff, RGA_CMD_BUF_SIZE, &CMDStart);\r
if(CMDMemSize == 0) {\r
- return -EINVAL; \r
+ return -EINVAL;\r
}\r
\r
AllSize = SrcMemSize + CMDMemSize;\r
- \r
- pages = (struct page **)kmalloc(AllSize * sizeof(struct page *), GFP_KERNEL);\r
+\r
+ pages = kzalloc(AllSize * sizeof(struct page *), GFP_KERNEL);\r
if(pages == NULL) {\r
pr_err("RGA MMU malloc pages mem failed\n");\r
status = RGA_MALLOC_ERROR;\r
- break; \r
+ break;\r
}\r
- \r
- MMU_Base = (uint32_t *)kmalloc(AllSize * sizeof(uint32_t), GFP_KERNEL);\r
+\r
+ MMU_Base = kzalloc(AllSize * sizeof(uint32_t), GFP_KERNEL);\r
if(pages == NULL) {\r
pr_err("RGA MMU malloc MMU_Base point failed\n");\r
status = RGA_MALLOC_ERROR;\r
- break; \r
+ break;\r
}\r
\r
for(i=0; i<CMDMemSize; i++) {\r
else\r
{\r
MMU_p = MMU_Base + CMDMemSize;\r
- \r
+\r
for(i=0; i<SrcMemSize; i++)\r
{\r
MMU_p[i] = (uint32_t)virt_to_phys((uint32_t *)((SrcStart + i) << PAGE_SHIFT));\r
- } \r
+ }\r
}\r
\r
- /* zsq \r
+ /* zsq\r
* change the buf address in req struct\r
- * for the reason of lie to MMU \r
+ * for the reason of lie to MMU\r
*/\r
req->mmu_info.base_addr = (virt_to_phys(MMU_Base) >> 2);\r
- \r
- req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT); \r
- \r
+\r
+ req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);\r
+\r
/*record the malloc buf for the cmd end to release*/\r
reg->MMU_base = MMU_Base;\r
\r
/* flush data to DDR */\r
+ #ifdef CONFIG_ARM\r
dmac_flush_range(MMU_Base, (MMU_Base + AllSize));\r
outer_flush_range(virt_to_phys(MMU_Base),virt_to_phys(MMU_Base + AllSize));\r
+ #elif defined(CONFIG_ARM64)\r
+ __dma_flush_range(MMU_Base, (MMU_Base + AllSize));\r
+ #endif\r
\r
if (pages != NULL) {\r
/* Free the page table */\r
}\r
\r
int rga_set_mmu_info(struct rga_reg *reg, struct rga_req *req)\r
-{ \r
+{\r
int ret;\r
- \r
+\r
switch (req->render_mode) {\r
- case bitblt_mode : \r
+ case bitblt_mode :\r
ret = rga_mmu_info_BitBlt_mode(reg, req);\r
break;\r
case color_palette_mode :\r
ret = rga_mmu_info_color_palette_mode(reg, req);\r
break;\r
case color_fill_mode :\r
- //printk("color_fill_mode is enable\n");\r
ret = rga_mmu_info_color_fill_mode(reg, req);\r
break;\r
case line_point_drawing_mode :\r
ret = rga_mmu_info_blur_sharp_filter_mode(reg, req);\r
break;\r
case pre_scaling_mode :\r
- //printk("pre_scaleing_mode is enable\n");\r
ret = rga_mmu_info_pre_scale_mode(reg, req);\r
break;\r
case update_palette_table_mode :\r
projects / firefly-linux-kernel-4.4.55.git / blobdiff