video: rockchip: hdmi: v2: get phy register setting from dts

[firefly-linux-kernel-4.4.55.git] / drivers / video / rockchip / hdmi / rockchip-hdmiv2 / rockchip_hdmiv2_hw.c

diff --git a/drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hw.c b/drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hw.c
index 0e669262c5a3d58573dddf0c39e115bdb1b2550e..59c2955fdcb3cd67f4dc293be823ff7c33cd9f8e 100755 (executable)
--- a/drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hw.c
+++ b/drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hw.c
@@ -486,28 +486,48 @@ static int rockchip_hdmiv2_config_phy(struct hdmi_dev *hdmi_dev)
                                          phy_mpll->gmp_cntrl));
        }
 
-       rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_CLKSYMCTRL,
-                                 v_OVERRIDE(1) | v_SLOPEBOOST(0) |
-                                 v_TX_SYMON(1) | v_TX_TRAON(0) |
-                                 v_TX_TRBON(0) | v_CLK_SYMON(1));
-       if (hdmi_dev->tmdsclk > 340000000) {
-               rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_TERM_RESIS,
-                                         v_TX_TERM(R50_OHMS));
-               rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_VLEVCTRL,
-                                         v_SUP_TXLVL(9) |
-                                         v_SUP_CLKLVL(17));
-       } else {
-               rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_TERM_RESIS,
-                                         v_TX_TERM(R100_OHMS));
-               if (hdmi_dev->tmdsclk > 165000000)
+       if (hdmi_dev->phy_table) {
+               for (i = 0; i < hdmi_dev->phy_table_size; i++)
+                       if (hdmi_dev->tmdsclk <= hdmi_dev->phy_table[i].maxfreq)
+                               break;
+       }
+       if (i == hdmi_dev->phy_table_size) {
+               pr_info("%s use default phy settings\n", __func__);
+               rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_CLKSYMCTRL,
+                                         v_OVERRIDE(1) | v_SLOPEBOOST(0) |
+                                         v_TX_SYMON(1) | v_CLK_SYMON(1) |
+                                         v_PREEMPHASIS(0));
+               if (hdmi_dev->tmdsclk > 340000000)
                        rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_VLEVCTRL,
+                                                 v_SUP_TXLVL(9) |
+                                                 v_SUP_CLKLVL(17));
+               else if (hdmi_dev->tmdsclk > 165000000)
+                       rockchip_hdmiv2_write_phy(hdmi_dev,
+                                                 PHYTX_VLEVCTRL,
                                                  v_SUP_TXLVL(14) |
                                                  v_SUP_CLKLVL(17));
                else
-                       rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_VLEVCTRL,
+                       rockchip_hdmiv2_write_phy(hdmi_dev,
+                                                 PHYTX_VLEVCTRL,
                                                  v_SUP_TXLVL(18) |
                                                  v_SUP_CLKLVL(17));
+       } else {
+               stat = v_OVERRIDE(1) | v_TX_SYMON(1) | v_CLK_SYMON(1) |
+                      v_PREEMPHASIS(hdmi_dev->phy_table[i].pre_emphasis) |
+                      v_SLOPEBOOST(hdmi_dev->phy_table[i].slopeboost);
+               rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_CLKSYMCTRL, stat);
+
+               stat = v_SUP_CLKLVL(hdmi_dev->phy_table[i].clk_level) |
+                      v_SUP_TXLVL(hdmi_dev->phy_table[i].data0_level);
+               rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_VLEVCTRL, stat);
        }
+
+       if (hdmi_dev->tmdsclk > 340000000)
+               rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_TERM_RESIS,
+                                         v_TX_TERM(R50_OHMS));
+       else
+               rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_TERM_RESIS,
+                                         v_TX_TERM(R100_OHMS));
        /* rockchip_hdmiv2_write_phy(hdmi_dev, 0x05, 0x8000); */
        if (hdmi_dev->tmdsclk_ratio_change)
                msleep(100);
@@ -521,6 +541,7 @@ static int rockchip_hdmiv2_config_phy(struct hdmi_dev *hdmi_dev)
        */
        /* check if the PHY PLL is locked */
        #define PHY_TIMEOUT     10000
+       i = 0;
        while (i++ < PHY_TIMEOUT) {
                if ((i % 10) == 0) {
                        stat = hdmi_readl(hdmi_dev, PHY_STAT0);