struct ehci_qh *async;
struct ehci_qh *dummy; /* For AMD quirk use */
struct ehci_qh *reclaim;
- struct ehci_qh *qh_scan_next;
unsigned scanning : 1;
/* periodic schedule support */
struct timer_list iaa_watchdog;
struct timer_list watchdog;
unsigned long actions;
+ unsigned stamp;
unsigned periodic_stamp;
unsigned random_frame;
unsigned long next_statechange;
unsigned fs_i_thresh:1; /* Intel iso scheduling */
unsigned use_dummy_qh:1; /* AMD Frame List table quirk*/
unsigned has_synopsys_hc_bug:1; /* Synopsys HC */
- unsigned frame_index_bug:1; /* MosChip (AKA NetMos) */
/* required for usb32 quirk */
#define OHCI_CTRL_HCFS (3 << 6)
struct ehci_qh *reclaim; /* next to reclaim */
struct ehci_hcd *ehci;
- unsigned long unlink_time;
/*
* Do NOT use atomic operations for QH refcounting. On some CPUs
#define NO_FRAME ((unsigned short)~0) /* pick new start */
struct usb_device *dev; /* access to TT */
- unsigned is_out:1; /* bulk or intr OUT */
unsigned clearing_tt:1; /* Clear-TT-Buf in progress */
};
#endif
-/*
- * Writing to dma coherent memory on ARM may be delayed via L2
- * writing buffer, so introduce the helper which can flush L2 writing
- * buffer into memory immediately, especially used to flush ehci
- * descriptor to memory.
- * */
-#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
-static inline void ehci_sync_mem()
-{
- mb();
-}
-#else
-static inline void ehci_sync_mem()
-{
-}
-#endif
-
-/*-------------------------------------------------------------------------*/
-
-#ifdef CONFIG_PCI
-
-/* For working around the MosChip frame-index-register bug */
-static unsigned ehci_read_frame_index(struct ehci_hcd *ehci);
-
-#else
-
-static inline unsigned ehci_read_frame_index(struct ehci_hcd *ehci)
-{
- return ehci_readl(ehci, &ehci->regs->frame_index);
-}
-
-#endif
-
/*-------------------------------------------------------------------------*/
#ifndef DEBUG