.name = "rk3036-usb20otg",
.pdata = &usb20otg_pdata_rk3036,
},
+ {
+ .name = "rk3126-usb20otg",
+ .pdata = &usb20otg_pdata_rk3126,
+ },
{},
};
#endif
.pdata = &usb20host_pdata_rk3288,
},
{
- .name = "rk3288-usb20host",
+ .name = "rk3036-usb20host",
.pdata = &usb20host_pdata_rk3036,
},
+ {
+ .name = "rk3126-usb20host",
+ .pdata = &usb20host_pdata_rk3126,
+ },
{},
};
#endif
-#ifdef CONFIG_RK_USB_UART
static u32 usb_to_uart_status;
-#endif
/*-------------------------------------------------------------------------*/
/* Encapsulate the module parameter settings */
local_irq_restore(flags);
}
-static void dwc_otg_set_force_mode(dwc_otg_core_if_t *core_if, int mode)
-{
- gusbcfg_data_t usbcfg = {.d32 = 0 };
- printk("!!!dwc_otg_set_force_mode\n");
- usbcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->gusbcfg);
- switch (mode) {
- case USB_MODE_FORCE_HOST:
- usbcfg.b.force_host_mode = 1;
- usbcfg.b.force_dev_mode = 0;
- break;
- case USB_MODE_FORCE_DEVICE:
- usbcfg.b.force_host_mode = 0;
- usbcfg.b.force_dev_mode = 1;
- break;
- case USB_MODE_NORMAL:
- usbcfg.b.force_host_mode = 0;
- usbcfg.b.force_dev_mode = 0;
- break;
- }
- DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg, usbcfg.d32);
-}
-
static ssize_t force_usb_mode_show(struct device_driver *drv, char *buf)
{
dwc_otg_device_t *otg_dev = g_otgdev;
.compatible = "rockchip,rk3036_usb20_host",
.data = &usb20host_pdata[RK3036_USB_CTLR],
},
+ {
+ .compatible = "rockchip,rk3126_usb20_host",
+ .data = &usb20host_pdata[RK3126_USB_CTLR],
+ },
{},
};
pldata->phy_suspend(pldata, USB_PHY_ENABLED);
if (pldata->soft_reset)
- pldata->soft_reset();
+ pldata->soft_reset(pldata, RST_POR);
res_base = platform_get_resource(_dev, IORESOURCE_MEM, 0);
static void dwc_otg_driver_shutdown(struct platform_device *_dev)
{
struct device *dev = &_dev->dev;
+ struct dwc_otg_platform_data *pldata = dev->platform_data;
dwc_otg_device_t *otg_dev = dev->platform_data;
dwc_otg_core_if_t *core_if = otg_dev->core_if;
dctl_data_t dctl = {.d32 = 0 };
DWC_PRINTF("%s: disconnect USB %s mode\n", __func__,
dwc_otg_is_host_mode(core_if) ? "host" : "device");
+
+ if( pldata->dwc_otg_uart_mode != NULL)
+ pldata->dwc_otg_uart_mode( pldata, PHY_USB_MODE);
+ if(pldata->phy_suspend != NULL)
+ pldata->phy_suspend(pldata, USB_PHY_ENABLED);
if (dwc_otg_is_host_mode(core_if)) {
if (core_if->hcd_cb && core_if->hcd_cb->stop)
core_if->hcd_cb->stop(core_if->hcd_cb_p);
.compatible = "rockchip,rk3036_usb20_otg",
.data = &usb20otg_pdata[RK3036_USB_CTLR],
},
+ {
+ .compatible = "rockchip,rk3126_usb20_otg",
+ .data = &usb20otg_pdata[RK3126_USB_CTLR],
+ },
{
},
};
struct dwc_otg_platform_data *pldata_otg;
struct dwc_otg_platform_data *pldata_host;
struct rkehci_platform_data *pldata_ehci;
-
+ if (cpu_is_rk312x()) {
+ pldata_otg = &usb20otg_pdata_rk3126;
+ if (usb_to_uart_status)
+ pldata_otg->dwc_otg_uart_mode(pldata_otg, PHY_UART_MODE);
+ }
if (cpu_is_rk3288()) {
#ifdef CONFIG_RK_USB_UART
/* enable USB bypass UART function */
struct dwc_otg_platform_data *pldata_host;
struct rkehci_platform_data *pldata_ehci;
+ if (cpu_is_rk312x()) {
+ pldata_otg = &usb20otg_pdata_rk3126;
+ usb_to_uart_status = pldata_otg->get_status(USB_STATUS_UARTMODE);
+ pldata_otg->dwc_otg_uart_mode(pldata_otg, PHY_USB_MODE);
+ }
if (cpu_is_rk3288()) {
#ifdef CONFIG_RK_USB_UART
/* disable USB bypass UART function */