<tr>
<td> rem_wakeup_pwrdn </td>
- <td> On read, shows the status core - hibernated or not. On write, initiates
+ <td> On read, shows the status core - hibernated or not. On write, initiates
a remote wakeup of the device from Hibernation. </td>
<td> Read/Write</td>
</tr>
<tr>
<td> mode_ch_tim_en </td>
- <td> This bit is used to enable or disable the host core to wait for 200 PHY
+ <td> This bit is used to enable or disable the host core to wait for 200 PHY
clock cycles at the end of Resume to change the opmode signal to the PHY to 00
after Suspend or LPM. </td>
<td> Read/Write</td>
</tr>
-
+
<tr>
<td> fr_interval </td>
- <td> On read, shows the value of HFIR Frame Interval. On write, dynamically
+ <td> On read, shows the value of HFIR Frame Interval. On write, dynamically
reload HFIR register during runtime. The application can write a value to this
- register only after the Port Enable bit of the Host Port Control and Status
+ register only after the Port Enable bit of the Host Port Control and Status
register (HPRT.PrtEnaPort) has been set </td>
<td> Read/Write</td>
</tr>
-
+
<tr>
<td> disconnect_us </td>
<td> On read, shows the status of disconnect_device_us. On write, sets disconnect_us
<td> Shows sleep status of device.
<td> Read</td>
</tr>
-
+
<tr>
<td> hird_thres </td>
<td> Gets or sets the "HIRD_Thres[3:0]" bits in the Core LPM Configuration Register.
<td> Read/Write</td>
</tr>
-
+
<tr>
<td> besl_reject </td>
<td> Gets or sets the "besl_reject" bit in the Device Control Register.
#include "dwc_otg_core_if.h"
#include "dwc_otg_pcd_if.h"
#include "dwc_otg_hcd_if.h"
+#include "dwc_otg_regs.h"
+#include "dwc_otg_cil.h"
+#include "usbdev_rk.h"
/*
* MACROs for defining sysfs attribute
*/
-
-#define DWC_OTG_DEVICE_ATTR_BITFIELD_SHOW(_otg_attr_name_,_string_) \
-static ssize_t _otg_attr_name_##_show (struct device *_dev, struct device_attribute *attr, char *buf) \
+#define DWC_OTG_DEVICE_ATTR_BITFIELD_SHOW(_otg_attr_name_, _string_) \
+static ssize_t _otg_attr_name_##_show(struct device *_dev, struct device_attribute *attr, char *buf) \
{ \
\
dwc_otg_device_t *otg_dev = _dev->platform_data; \
uint32_t val; \
- val = dwc_otg_get_##_otg_attr_name_ (otg_dev->core_if); \
- return sprintf (buf, "%s = 0x%x\n", _string_, val); \
+ val = dwc_otg_get_##_otg_attr_name_(otg_dev->core_if); \
+ return sprintf(buf, "%s = 0x%x\n", _string_, val); \
}
-#define DWC_OTG_DEVICE_ATTR_BITFIELD_STORE(_otg_attr_name_,_string_) \
-static ssize_t _otg_attr_name_##_store (struct device *_dev, struct device_attribute *attr, \
+#define DWC_OTG_DEVICE_ATTR_BITFIELD_STORE(_otg_attr_name_, _string_) \
+static ssize_t _otg_attr_name_##_store(struct device *_dev, struct device_attribute *attr, \
const char *buf, size_t count) \
{ \
\
* MACROs for defining sysfs attribute for 32-bit registers
*/
-#define DWC_OTG_DEVICE_ATTR_REG_SHOW(_otg_attr_name_,_string_) \
-static ssize_t _otg_attr_name_##_show (struct device *_dev, struct device_attribute *attr, char *buf) \
+#define DWC_OTG_DEVICE_ATTR_REG_SHOW(_otg_attr_name_, _string_) \
+static ssize_t _otg_attr_name_##_show(struct device *_dev, struct device_attribute *attr, char *buf) \
{ \
\
dwc_otg_device_t *otg_dev = _dev->platform_data; \
uint32_t val; \
- val = dwc_otg_get_##_otg_attr_name_ (otg_dev->core_if); \
- return sprintf (buf, "%s = 0x%08x\n", _string_, val); \
+ val = dwc_otg_get_##_otg_attr_name_(otg_dev->core_if); \
+ return sprintf(buf, "%s = 0x%08x\n", _string_, val); \
}
-#define DWC_OTG_DEVICE_ATTR_REG_STORE(_otg_attr_name_,_string_) \
-static ssize_t _otg_attr_name_##_store (struct device *_dev, struct device_attribute *attr, \
+#define DWC_OTG_DEVICE_ATTR_REG_STORE(_otg_attr_name_, _string_) \
+static ssize_t _otg_attr_name_##_store(struct device *_dev, struct device_attribute *attr, \
const char *buf, size_t count) \
{ \
\
dwc_otg_device_t *otg_dev = _dev->platform_data; \
uint32_t val = simple_strtoul(buf, NULL, 16); \
- dwc_otg_set_##_otg_attr_name_ (otg_dev->core_if, val); \
+ dwc_otg_set_##_otg_attr_name_(otg_dev->core_if, val); \
return count; \
}
-#define DWC_OTG_DEVICE_ATTR_BITFIELD_RW(_otg_attr_name_,_string_) \
-DWC_OTG_DEVICE_ATTR_BITFIELD_SHOW(_otg_attr_name_,_string_) \
-DWC_OTG_DEVICE_ATTR_BITFIELD_STORE(_otg_attr_name_,_string_) \
-DEVICE_ATTR(_otg_attr_name_,0644,_otg_attr_name_##_show,_otg_attr_name_##_store);
+#define DWC_OTG_DEVICE_ATTR_BITFIELD_RW(_otg_attr_name_, _string_) \
+DWC_OTG_DEVICE_ATTR_BITFIELD_SHOW(_otg_attr_name_, _string_) \
+DWC_OTG_DEVICE_ATTR_BITFIELD_STORE(_otg_attr_name_, _string_) \
+DEVICE_ATTR(_otg_attr_name_, 0644, _otg_attr_name_##_show, \
+ _otg_attr_name_##_store);
-#define DWC_OTG_DEVICE_ATTR_BITFIELD_RO(_otg_attr_name_,_string_) \
-DWC_OTG_DEVICE_ATTR_BITFIELD_SHOW(_otg_attr_name_,_string_) \
-DEVICE_ATTR(_otg_attr_name_,0444,_otg_attr_name_##_show,NULL);
+#define DWC_OTG_DEVICE_ATTR_BITFIELD_RO(_otg_attr_name_, _string_) \
+DWC_OTG_DEVICE_ATTR_BITFIELD_SHOW(_otg_attr_name_, _string_) \
+DEVICE_ATTR(_otg_attr_name_, 0444, _otg_attr_name_##_show, NULL);
-#define DWC_OTG_DEVICE_ATTR_REG32_RW(_otg_attr_name_,_addr_,_string_) \
-DWC_OTG_DEVICE_ATTR_REG_SHOW(_otg_attr_name_,_string_) \
-DWC_OTG_DEVICE_ATTR_REG_STORE(_otg_attr_name_,_string_) \
-DEVICE_ATTR(_otg_attr_name_,0644,_otg_attr_name_##_show,_otg_attr_name_##_store);
+#define DWC_OTG_DEVICE_ATTR_REG32_RW(_otg_attr_name_, _addr_, _string_) \
+DWC_OTG_DEVICE_ATTR_REG_SHOW(_otg_attr_name_, _string_) \
+DWC_OTG_DEVICE_ATTR_REG_STORE(_otg_attr_name_, _string_) \
+DEVICE_ATTR(_otg_attr_name_, 0644, _otg_attr_name_##_show, \
+ _otg_attr_name_##_store);
-#define DWC_OTG_DEVICE_ATTR_REG32_RO(_otg_attr_name_,_addr_,_string_) \
-DWC_OTG_DEVICE_ATTR_REG_SHOW(_otg_attr_name_,_string_) \
-DEVICE_ATTR(_otg_attr_name_,0444,_otg_attr_name_##_show,NULL);
+#define DWC_OTG_DEVICE_ATTR_REG32_RO(_otg_attr_name_, _addr_, _string_) \
+DWC_OTG_DEVICE_ATTR_REG_SHOW(_otg_attr_name_, _string_) \
+DEVICE_ATTR(_otg_attr_name_, 0444, _otg_attr_name_##_show, NULL);
void dwc_set_device_platform_data(struct platform_device *pdev, void *data)
{
- if(NULL == pdev || NULL == &pdev->dev)
- DWC_ERROR("NULL Pointer in func %s \n", __func__);
+ if (NULL == pdev || NULL == &pdev->dev)
+ DWC_ERROR("NULL Pointer in func %s \n", __func__);
pdev->dev.platform_data = data;
}
void *dwc_get_device_platform_data(const struct platform_device *pdev)
{
- if(NULL == pdev || NULL == &pdev->dev)
- DWC_ERROR("NULL Pointer in func %s \n", __func__);
+ if (NULL == pdev || NULL == &pdev->dev)
+ DWC_ERROR("NULL Pointer in func %s \n", __func__);
return pdev->dev.platform_data;
}
struct device_attribute *attr, char *buf)
{
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
return snprintf(buf, sizeof("0xFFFFFFFF\n") + 1, "0x%08x\n",
}
/**
- * Set the register offset for the next Register Access Read/Write
+ * Set the register offset for the next Register Access Read/Write
*/
static ssize_t regoffset_store(struct device *_dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
uint32_t offset = simple_strtoul(buf, NULL, 16);
- if (offset < SZ_256K) {
+ if (offset < SZ_256K)
otg_dev->os_dep.reg_offset = offset;
- } else {
+ else
dev_err(_dev, "invalid offset\n");
- }
return count;
}
struct device_attribute *attr, char *buf)
{
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
uint32_t val;
volatile uint32_t *addr;
- if (otg_dev->os_dep.reg_offset != 0xFFFFFFFF && 0 != otg_dev->os_dep.base) {
+ if (otg_dev->os_dep.reg_offset != 0xFFFFFFFF
+ && 0 != otg_dev->os_dep.base) {
/* Calculate the address */
addr = (uint32_t *) (otg_dev->os_dep.reg_offset +
(uint8_t *) otg_dev->os_dep.base);
val = DWC_READ_REG32(addr);
return snprintf(buf,
sizeof("Reg@0xFFFFFFFF = 0xFFFFFFFF\n") + 1,
- "Reg@0x%06x = 0x%08x\n", otg_dev->os_dep.reg_offset,
- val);
+ "Reg@0x%06x = 0x%08x\n",
+ otg_dev->os_dep.reg_offset, val);
} else {
- dev_err(_dev, "Invalid offset (0x%0x)\n", otg_dev->os_dep.reg_offset);
+ dev_err(_dev, "Invalid offset (0x%0x)\n",
+ otg_dev->os_dep.reg_offset);
return sprintf(buf, "invalid offset\n");
}
}
const char *buf, size_t count)
{
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
volatile uint32_t *addr;
uint32_t val = simple_strtoul(buf, NULL, 16);
- //dev_dbg(_dev, "Offset=0x%08x Val=0x%08x\n", otg_dev->reg_offset, val);
- if (otg_dev->os_dep.reg_offset != 0xFFFFFFFF && 0 != otg_dev->os_dep.base) {
+ /* dev_dbg(_dev, "Offset=0x%08x Val=0x%08x\n",
+ * otg_dev->reg_offset, val);
+ */
+ if (otg_dev->os_dep.reg_offset != 0xFFFFFFFF
+ && 0 != otg_dev->os_dep.base) {
/* Calculate the address */
addr = (uint32_t *) (otg_dev->os_dep.reg_offset +
(uint8_t *) otg_dev->os_dep.base);
DWC_OTG_DEVICE_ATTR_BITFIELD_RW(hsic_connect, "HSIC Connect");
DWC_OTG_DEVICE_ATTR_BITFIELD_RW(inv_sel_hsic, "Invert Select HSIC");
-//DWC_OTG_DEVICE_ATTR_BITFIELD_RW(buspower,&(otg_dev->core_if->core_global_regs->gotgctl),(1<<8),8,"Mode");
-//DWC_OTG_DEVICE_ATTR_BITFIELD_RW(bussuspend,&(otg_dev->core_if->core_global_regs->gotgctl),(1<<8),8,"Mode");
+/* DWC_OTG_DEVICE_ATTR_BITFIELD_RW(buspower,
+ * &(otg_dev->core_if->core_global_regs->gotgctl), (1<<8), 8, "Mode");
+ */
+/* DWC_OTG_DEVICE_ATTR_BITFIELD_RW(bussuspend,
+ * &(otg_dev->core_if->core_global_regs->gotgctl), (1<<8), 8, "Mode");
+ */
DWC_OTG_DEVICE_ATTR_BITFIELD_RO(busconnected, "Bus Connected");
DWC_OTG_DEVICE_ATTR_REG32_RW(gotgctl, 0, "GOTGCTL");
"HPTXFSIZ");
DWC_OTG_DEVICE_ATTR_REG32_RW(hprt0, otg_dev->core_if->host_if->hprt0, "HPRT0");
-/**
- * @todo Add code to initiate the HNP.
- */
-/**
- * Show the HNP status bit
- */
-static ssize_t hnp_show(struct device *_dev,
- struct device_attribute *attr, char *buf)
-{
-
-
- dwc_otg_device_t *otg_dev = _dev->platform_data;
- return sprintf(buf, "HstNegScs = 0x%x\n",
- dwc_otg_get_hnpstatus(otg_dev->core_if));
-}
-
-/**
- * Set the HNP Request bit
- */
-static ssize_t hnp_store(struct device *_dev,
- struct device_attribute *attr,
- const char *buf, size_t count)
-{
-
-
- dwc_otg_device_t *otg_dev = _dev->platform_data;
- uint32_t in = simple_strtoul(buf, NULL, 16);
- dwc_otg_set_hnpreq(otg_dev->core_if, in);
- return count;
-}
-
-DEVICE_ATTR(hnp, 0644, hnp_show, hnp_store);
-
-/**
- * @todo Add code to initiate the SRP.
- */
-/**
- * Show the SRP status bit
- */
-static ssize_t srp_show(struct device *_dev,
- struct device_attribute *attr, char *buf)
-{
-#ifndef DWC_HOST_ONLY
-
-
- dwc_otg_device_t *otg_dev = _dev->platform_data;
- return sprintf(buf, "SesReqScs = 0x%x\n",
- dwc_otg_get_srpstatus(otg_dev->core_if));
-#else
- return sprintf(buf, "Host Only Mode!\n");
-#endif
-}
-
-/**
- * Set the SRP Request bit
- */
-static ssize_t srp_store(struct device *_dev,
- struct device_attribute *attr,
- const char *buf, size_t count)
-{
-#ifndef DWC_HOST_ONLY
-
-
- dwc_otg_device_t *otg_dev = _dev->platform_data;
- dwc_otg_pcd_initiate_srp(otg_dev->pcd);
-#endif
- return count;
-}
-
-DEVICE_ATTR(srp, 0644, srp_show, srp_store);
-
/**
* @todo Need to do more for power on/off?
*/
struct device_attribute *attr, char *buf)
{
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
return sprintf(buf, "Bus Power = 0x%x\n",
dwc_otg_get_prtpower(otg_dev->core_if));
struct device_attribute *attr,
const char *buf, size_t count)
{
-
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
+ struct dwc_otg_platform_data *pldata = otg_dev->pldata;
uint32_t on = simple_strtoul(buf, NULL, 16);
+
+ if (on != 0 && on != 1)
+ return -EINVAL;
+
dwc_otg_set_prtpower(otg_dev->core_if, on);
+ pldata->power_enable(on);
return count;
}
struct device_attribute *attr, char *buf)
{
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
return sprintf(buf, "Bus Suspend = 0x%x\n",
dwc_otg_get_prtsuspend(otg_dev->core_if));
const char *buf, size_t count)
{
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
uint32_t in = simple_strtoul(buf, NULL, 16);
dwc_otg_set_prtsuspend(otg_dev->core_if, in);
struct device_attribute *attr, char *buf)
{
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
return sprintf(buf, "Mode Change Ready Timer Enable = 0x%x\n",
dwc_otg_get_mode_ch_tim(otg_dev->core_if));
const char *buf, size_t count)
{
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
uint32_t in = simple_strtoul(buf, NULL, 16);
dwc_otg_set_mode_ch_tim(otg_dev->core_if, in);
struct device_attribute *attr, char *buf)
{
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
return sprintf(buf, "Frame Interval = 0x%x\n",
dwc_otg_get_fr_interval(otg_dev->core_if));
const char *buf, size_t count)
{
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
uint32_t in = simple_strtoul(buf, NULL, 10);
dwc_otg_set_fr_interval(otg_dev->core_if, in);
{
#ifndef DWC_HOST_ONLY
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
return sprintf(buf,
- "Remote Wakeup Sig = %d Enabled = %d LPM Remote Wakeup = %d\n",
- dwc_otg_get_remotewakesig(otg_dev->core_if),
- dwc_otg_pcd_get_rmwkup_enable(otg_dev->pcd),
- dwc_otg_get_lpm_remotewakeenabled(otg_dev->core_if));
+ "Remote Wakeup Sig = %d\n",
+ dwc_otg_get_remotewakesig(otg_dev->core_if));
#else
return sprintf(buf, "Host Only Mode!\n");
#endif /* DWC_HOST_ONLY */
{
#ifndef DWC_HOST_ONLY
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
uint32_t val = simple_strtoul(buf, NULL, 16);
- if (val & 1) {
+ if (val & 1)
dwc_otg_pcd_remote_wakeup(otg_dev->pcd, 1);
- } else {
+ else
dwc_otg_pcd_remote_wakeup(otg_dev->pcd, 0);
- }
+
#endif /* DWC_HOST_ONLY */
return count;
}
remote_wakeup_store);
/**
- * Show the whether core is hibernated or not.
+ * Show the whether core is hibernated or not.
*/
static ssize_t rem_wakeup_pwrdn_show(struct device *_dev,
struct device_attribute *attr, char *buf)
{
#ifndef DWC_HOST_ONLY
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
- if (dwc_otg_get_core_state(otg_dev->core_if)) {
+ if (dwc_otg_get_core_state(otg_dev->core_if))
DWC_PRINTF("Core is in hibernation\n");
- } else {
+ else
DWC_PRINTF("Core is not in hibernation\n");
- }
+
#endif /* DWC_HOST_ONLY */
return 0;
}
-extern int dwc_otg_device_hibernation_restore(dwc_otg_core_if_t * core_if,
+extern int dwc_otg_device_hibernation_restore(dwc_otg_core_if_t *core_if,
int rem_wakeup, int reset);
/**
{
#ifndef DWC_HOST_ONLY
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
dwc_otg_device_hibernation_restore(otg_dev->core_if, 1, 0);
#endif
#ifndef DWC_HOST_ONLY
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
uint32_t val = simple_strtoul(buf, NULL, 16);
DWC_PRINTF("The Passed value is %04x\n", val);
struct device_attribute *attr, char *buf)
{
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
dwc_otg_dump_global_registers(otg_dev->core_if);
- if (dwc_otg_is_host_mode(otg_dev->core_if)) {
+ if (dwc_otg_is_host_mode(otg_dev->core_if))
dwc_otg_dump_host_registers(otg_dev->core_if);
- } else {
+ else
dwc_otg_dump_dev_registers(otg_dev->core_if);
- }
return sprintf(buf, "Register Dump\n");
}
struct device_attribute *attr, char *buf)
{
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
dwc_otg_dump_spram(otg_dev->core_if);
{
#ifndef DWC_DEVICE_ONLY
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
dwc_otg_hcd_dump_state(otg_dev->hcd);
#endif /* DWC_DEVICE_ONLY */
{
#ifndef DWC_DEVICE_ONLY
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
dwc_otg_hcd_dump_frrem(otg_dev->hcd);
#endif /* DWC_DEVICE_ONLY */
* output shows the number of times the register is read).
*/
#define RW_REG_COUNT 10000000
-#define MSEC_PER_JIFFIE 1000/HZ
+#define MSEC_PER_JIFFIE (1000/HZ)
static ssize_t rd_reg_test_show(struct device *_dev,
struct device_attribute *attr, char *buf)
{
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
int i;
int time;
printk("HZ %d, MSEC_PER_JIFFIE %d, loops_per_jiffy %lu\n",
HZ, MSEC_PER_JIFFIE, loops_per_jiffy);
start_jiffies = jiffies;
- for (i = 0; i < RW_REG_COUNT; i++) {
+ for (i = 0; i < RW_REG_COUNT; i++)
dwc_otg_get_gnptxfsiz(otg_dev->core_if);
- }
time = jiffies - start_jiffies;
return sprintf(buf,
"Time to read GNPTXFSIZ reg %d times: %d msecs (%d jiffies)\n",
struct device_attribute *attr, char *buf)
{
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
uint32_t reg_val;
int i;
HZ, MSEC_PER_JIFFIE, loops_per_jiffy);
reg_val = dwc_otg_get_gnptxfsiz(otg_dev->core_if);
start_jiffies = jiffies;
- for (i = 0; i < RW_REG_COUNT; i++) {
+ for (i = 0; i < RW_REG_COUNT; i++)
dwc_otg_set_gnptxfsiz(otg_dev->core_if, reg_val);
- }
time = jiffies - start_jiffies;
return sprintf(buf,
"Time to write GNPTXFSIZ reg %d times: %d msecs (%d jiffies)\n",
struct device_attribute *attr, char *buf)
{
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
if (!dwc_otg_get_param_lpm_enable(otg_dev->core_if))
return sprintf(buf, "** LPM is DISABLED **\n");
- if (!dwc_otg_is_device_mode(otg_dev->core_if)) {
+ if (!dwc_otg_is_device_mode(otg_dev->core_if))
return sprintf(buf, "** Current mode is not device mode\n");
- }
+
return sprintf(buf, "lpm_response = %d\n",
dwc_otg_get_lpmresponse(otg_dev->core_if));
}
const char *buf, size_t count)
{
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
uint32_t val = simple_strtoul(buf, NULL, 16);
- if (!dwc_otg_get_param_lpm_enable(otg_dev->core_if)) {
+ if (!dwc_otg_get_param_lpm_enable(otg_dev->core_if))
return 0;
- }
- if (!dwc_otg_is_device_mode(otg_dev->core_if)) {
+ if (!dwc_otg_is_device_mode(otg_dev->core_if))
return 0;
- }
dwc_otg_set_lpmresponse(otg_dev->core_if, val);
return count;
* Show the besl_reject attribute.
*/
static ssize_t beslreject_show(struct device *_dev,
- struct device_attribute *attr, char *buf)
+ struct device_attribute *attr, char *buf)
{
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
-
+
if (!dwc_otg_get_param_lpm_enable(otg_dev->core_if))
return sprintf(buf, "** LPM is DISABLED **\n");
if (!dwc_otg_get_param_besl_enable(otg_dev->core_if))
- return sprintf(buf, "** EnBesl is DISABLED **\n");
+ return sprintf(buf, "** EnBesl is DISABLED **\n");
- if (!dwc_otg_is_device_mode(otg_dev->core_if)) {
+ if (!dwc_otg_is_device_mode(otg_dev->core_if))
return sprintf(buf, "** Current mode is not device mode\n");
- }
-
+
return sprintf(buf, "besl_reject = %d\n",
- dwc_otg_get_beslreject(otg_dev->core_if));
+ dwc_otg_get_beslreject(otg_dev->core_if));
}
/**
* Store the besl_reject attribute.
*/
static ssize_t beslreject_store(struct device *_dev,
- struct device_attribute *attr,
- const char *buf, size_t count)
+ struct device_attribute *attr,
+ const char *buf, size_t count)
{
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
uint32_t val = simple_strtoul(buf, NULL, 16);
- if (!dwc_otg_get_param_lpm_enable(otg_dev->core_if)) {
+ if (!dwc_otg_get_param_lpm_enable(otg_dev->core_if))
return 0;
- }
-
- if (!dwc_otg_get_param_besl_enable(otg_dev->core_if)) {
+
+ if (!dwc_otg_get_param_besl_enable(otg_dev->core_if))
return 0;
- }
- if (!dwc_otg_is_device_mode(otg_dev->core_if)) {
+ if (!dwc_otg_is_device_mode(otg_dev->core_if))
return 0;
- }
-
- dwc_otg_set_beslreject(otg_dev->core_if,val);
-
+
+ dwc_otg_set_beslreject(otg_dev->core_if, val);
+
return count;
}
* Show the hird_thresh attribute.
*/
static ssize_t hirdthresh_show(struct device *_dev,
- struct device_attribute *attr, char *buf)
+ struct device_attribute *attr, char *buf)
{
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
-
+
if (!dwc_otg_get_param_lpm_enable(otg_dev->core_if))
return sprintf(buf, "** LPM is DISABLED **\n");
-
- if (!dwc_otg_is_device_mode(otg_dev->core_if)) {
+
+ if (!dwc_otg_is_device_mode(otg_dev->core_if))
return sprintf(buf, "** Current mode is not device mode\n");
- }
-
+
return sprintf(buf, "hirdthresh = 0x%x\n",
- dwc_otg_get_hirdthresh(otg_dev->core_if));
+ dwc_otg_get_hirdthresh(otg_dev->core_if));
}
/**
* Store the hird_thresh attribute.
*/
static ssize_t hirdthresh_store(struct device *_dev,
- struct device_attribute *attr,
- const char *buf, size_t count)
+ struct device_attribute *attr,
+ const char *buf, size_t count)
{
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
uint32_t val = simple_strtoul(buf, NULL, 16);
- if (!dwc_otg_get_param_lpm_enable(otg_dev->core_if)) {
+ if (!dwc_otg_get_param_lpm_enable(otg_dev->core_if))
return 0;
- }
-
- if (!dwc_otg_is_device_mode(otg_dev->core_if)) {
+
+ if (!dwc_otg_is_device_mode(otg_dev->core_if))
return 0;
- }
-
- dwc_otg_set_hirdthresh(otg_dev->core_if,val);
-
+
+ dwc_otg_set_hirdthresh(otg_dev->core_if, val);
+
return count;
}
struct device_attribute *attr, char *buf)
{
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
return sprintf(buf, "Sleep Status = %d\n",
dwc_otg_get_lpm_portsleepstatus(otg_dev->core_if));
const char *buf, size_t count)
{
-
dwc_otg_device_t *otg_dev = _dev->platform_data;
dwc_otg_core_if_t *core_if = otg_dev->core_if;
#endif /* CONFIG_USB_DWC_OTG_LPM_ENABLE */
+static int test_sq(dwc_otg_core_if_t *core_if)
+{
+ hprt0_data_t hprt0 = { .d32 = 0 };
+ dctl_data_t dctl = { .d32 = 0 };
+ dsts_data_t dsts = { .d32 = 0 };
+
+ /**
+ * Step.1 check current mode
+ * Step.2 check connection
+ * Step.3 enter test packet mode
+ */
+
+ if (dwc_otg_is_host_mode(core_if)) {
+ DWC_PRINTF("Host Mode\n");
+ hprt0.d32 = DWC_READ_REG32(core_if->host_if->hprt0);
+
+ if (hprt0.b.prtena && !hprt0.b.prtsusp &&
+ hprt0.b.prtspd == DWC_HPRT0_PRTSPD_HIGH_SPEED) {
+ hprt0.d32 = 0;
+ hprt0.b.prttstctl = 0x4;
+ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32);
+ DWC_PRINTF("Start packet test\n");
+ return 0;
+
+ } else
+ DWC_PRINTF("Invalid connect status HPRT0 = 0x%08x\n",
+ hprt0.d32);
+ } else {
+ DWC_PRINTF("Device Mode\n");
+ dsts.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dsts);
+
+ if (!dsts.b.suspsts &&
+ dsts.b.enumspd == DWC_DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ) {
+ dctl.b.tstctl = 0x4;
+ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dctl,
+ dctl.d32);
+ DWC_PRINTF("Start packet test\n");
+ return 0;
+
+ } else
+ DWC_PRINTF("Invalid connect status DSTS = 0x%08x\n",
+ dsts.d32);
+ }
+
+ return -1;
+
+}
+
+/**
+* Show the usage of usb controler test_sq attribute.
+*/
+static ssize_t test_sq_show(struct device *_dev,
+ struct device_attribute *attr, char *buf)
+{
+ return sprintf(buf,
+ "USAGE : echo anything to \"test\" to start test packet pattern\n");
+}
+
+static ssize_t test_sq_store(struct device *_dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+
+{
+ dwc_otg_device_t *otg_dev = _dev->platform_data;
+ struct dwc_otg_platform_data *pldata = otg_dev->pldata;
+
+ if (pldata->phy_status == USB_PHY_SUSPEND) {
+ DWC_PRINTF("Invalid status : SUSPEND\n");
+ return -EBUSY;
+ }
+
+ if (test_sq(otg_dev->core_if))
+ return -EBUSY;
+ else
+ return count;
+}
+
+DEVICE_ATTR(test_sq, S_IWUSR | S_IRUSR, test_sq_show, test_sq_store);
+
/**@}*/
/**
* Create the device files
*/
-void dwc_otg_attr_create(
-
- struct platform_device *dev
- )
+void dwc_otg_attr_create(struct platform_device *dev)
{
int error;
error = device_create_file(&dev->dev, &dev_attr_regoffset);
error = device_create_file(&dev->dev, &dev_attr_regvalue);
error = device_create_file(&dev->dev, &dev_attr_mode);
- error = device_create_file(&dev->dev, &dev_attr_hnpcapable);
- error = device_create_file(&dev->dev, &dev_attr_srpcapable);
- error = device_create_file(&dev->dev, &dev_attr_hsic_connect);
- error = device_create_file(&dev->dev, &dev_attr_inv_sel_hsic);
- error = device_create_file(&dev->dev, &dev_attr_hnp);
- error = device_create_file(&dev->dev, &dev_attr_srp);
error = device_create_file(&dev->dev, &dev_attr_buspower);
error = device_create_file(&dev->dev, &dev_attr_bussuspend);
error = device_create_file(&dev->dev, &dev_attr_mode_ch_tim_en);
error = device_create_file(&dev->dev, &dev_attr_hptxfsiz);
error = device_create_file(&dev->dev, &dev_attr_hprt0);
error = device_create_file(&dev->dev, &dev_attr_remote_wakeup);
- error = device_create_file(&dev->dev, &dev_attr_rem_wakeup_pwrdn);
error = device_create_file(&dev->dev, &dev_attr_disconnect_us);
error = device_create_file(&dev->dev, &dev_attr_regdump);
error = device_create_file(&dev->dev, &dev_attr_spramdump);
error = device_create_file(&dev->dev, &dev_attr_besl_reject);
error = device_create_file(&dev->dev, &dev_attr_hird_thres);
#endif
+ error = device_create_file(&dev->dev, &dev_attr_test_sq);
}
/**
* Remove the device files
*/
-void dwc_otg_attr_remove(
-
- struct platform_device *dev
- )
+void dwc_otg_attr_remove(struct platform_device *dev)
{
device_remove_file(&dev->dev, &dev_attr_regoffset);
device_remove_file(&dev->dev, &dev_attr_regvalue);
device_remove_file(&dev->dev, &dev_attr_mode);
- device_remove_file(&dev->dev, &dev_attr_hnpcapable);
- device_remove_file(&dev->dev, &dev_attr_srpcapable);
- device_remove_file(&dev->dev, &dev_attr_hsic_connect);
- device_remove_file(&dev->dev, &dev_attr_inv_sel_hsic);
- device_remove_file(&dev->dev, &dev_attr_hnp);
- device_remove_file(&dev->dev, &dev_attr_srp);
device_remove_file(&dev->dev, &dev_attr_buspower);
device_remove_file(&dev->dev, &dev_attr_bussuspend);
device_remove_file(&dev->dev, &dev_attr_mode_ch_tim_en);
device_remove_file(&dev->dev, &dev_attr_hptxfsiz);
device_remove_file(&dev->dev, &dev_attr_hprt0);
device_remove_file(&dev->dev, &dev_attr_remote_wakeup);
- device_remove_file(&dev->dev, &dev_attr_rem_wakeup_pwrdn);
device_remove_file(&dev->dev, &dev_attr_disconnect_us);
device_remove_file(&dev->dev, &dev_attr_regdump);
device_remove_file(&dev->dev, &dev_attr_spramdump);
device_remove_file(&dev->dev, &dev_attr_besl_reject);
device_remove_file(&dev->dev, &dev_attr_hird_thres);
#endif
+ device_remove_file(&dev->dev, &dev_attr_test_sq);
}
projects / firefly-linux-kernel-4.4.55.git / blobdiff