Revert "UPSTREAM: usb: dwc3: drop FIFO resizing logic"

[firefly-linux-kernel-4.4.55.git] / drivers / usb / dwc3 / gadget.c

diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index e735b2a88a1a2c31df5a7e753d9e6c1aa40123aa..bc2720108adba04d45c42b81ef54f47498aa11d4 100644 (file)
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -145,6 +145,92 @@ int dwc3_gadget_set_link_state(struct dwc3 *dwc, enum dwc3_link_state state)
        return -ETIMEDOUT;
 }
 
+/**
+ * dwc3_gadget_resize_tx_fifos - reallocate fifo spaces for current use-case
+ * @dwc: pointer to our context structure
+ *
+ * This function will a best effort FIFO allocation in order
+ * to improve FIFO usage and throughput, while still allowing
+ * us to enable as many endpoints as possible.
+ *
+ * Keep in mind that this operation will be highly dependent
+ * on the configured size for RAM1 - which contains TxFifo -,
+ * the amount of endpoints enabled on coreConsultant tool, and
+ * the width of the Master Bus.
+ *
+ * In the ideal world, we would always be able to satisfy the
+ * following equation:
+ *
+ * ((512 + 2 * MDWIDTH-Bytes) + (Number of IN Endpoints - 1) * \
+ * (3 * (1024 + MDWIDTH-Bytes) + MDWIDTH-Bytes)) / MDWIDTH-Bytes
+ *
+ * Unfortunately, due to many variables that's not always the case.
+ */
+int dwc3_gadget_resize_tx_fifos(struct dwc3 *dwc)
+{
+       int             last_fifo_depth = 0;
+       int             ram1_depth;
+       int             fifo_size;
+       int             mdwidth;
+       int             num;
+
+       if (!dwc->needs_fifo_resize)
+               return 0;
+
+       ram1_depth = DWC3_RAM1_DEPTH(dwc->hwparams.hwparams7);
+       mdwidth = DWC3_MDWIDTH(dwc->hwparams.hwparams0);
+
+       /* MDWIDTH is represented in bits, we need it in bytes */
+       mdwidth >>= 3;
+
+       /*
+        * FIXME For now we will only allocate 1 wMaxPacketSize space
+        * for each enabled endpoint, later patches will come to
+        * improve this algorithm so that we better use the internal
+        * FIFO space
+        */
+       for (num = 0; num < dwc->num_in_eps; num++) {
+               /* bit0 indicates direction; 1 means IN ep */
+               struct dwc3_ep  *dep = dwc->eps[(num << 1) | 1];
+               int             mult = 1;
+               int             tmp;
+
+               if (!(dep->flags & DWC3_EP_ENABLED))
+                       continue;
+
+               if (usb_endpoint_xfer_bulk(dep->endpoint.desc)
+                               || usb_endpoint_xfer_isoc(dep->endpoint.desc))
+                       mult = 3;
+
+               /*
+                * REVISIT: the following assumes we will always have enough
+                * space available on the FIFO RAM for all possible use cases.
+                * Make sure that's true somehow and change FIFO allocation
+                * accordingly.
+                *
+                * If we have Bulk or Isochronous endpoints, we want
+                * them to be able to be very, very fast. So we're giving
+                * those endpoints a fifo_size which is enough for 3 full
+                * packets
+                */
+               tmp = mult * (dep->endpoint.maxpacket + mdwidth);
+               tmp += mdwidth;
+
+               fifo_size = DIV_ROUND_UP(tmp, mdwidth);
+
+               fifo_size |= (last_fifo_depth << 16);
+
+               dwc3_trace(trace_dwc3_gadget, "%s: Fifo Addr %04x Size %d",
+                               dep->name, last_fifo_depth, fifo_size & 0xffff);
+
+               dwc3_writel(dwc->regs, DWC3_GTXFIFOSIZ(num), fifo_size);
+
+               last_fifo_depth += (fifo_size & 0xffff);
+       }
+
+       return 0;
+}
+
 void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
                int status)
 {