usb: dwc3: add dis_u3_autosuspend_quirk
[firefly-linux-kernel-4.4.55.git] / drivers / usb / dwc3 / core.h
index 4264221127be6adb3004ecb7e162c84a1fd518b0..dff3aed23689e10d5a0b2e467100279a269c7d57 100644 (file)
 
 /* Global USB2 PHY Configuration Register */
 #define DWC3_GUSB2PHYCFG_PHYSOFTRST    (1 << 31)
+#define DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS     (1 << 30)
 #define DWC3_GUSB2PHYCFG_SUSPHY                (1 << 6)
 #define DWC3_GUSB2PHYCFG_ULPI_UTMI     (1 << 4)
 #define DWC3_GUSB2PHYCFG_ENBLSLPM      (1 << 8)
+#define DWC3_GUSB2PHYCFG_PHYIF(n)      (n << 3)
+#define DWC3_GUSB2PHYCFG_PHYIF_MASK    DWC3_GUSB2PHYCFG_PHYIF(1)
+#define DWC3_GUSB2PHYCFG_USBTRDTIM(n)  (n << 10)
+#define DWC3_GUSB2PHYCFG_USBTRDTIM_MASK        DWC3_GUSB2PHYCFG_USBTRDTIM(0xf)
+#define USBTRDTIM_UTMI_8_BIT           9
+#define USBTRDTIM_UTMI_16_BIT          5
+#define UTMI_PHYIF_16_BIT              1
+#define UTMI_PHYIF_8_BIT               0
 
 /* Global USB2 PHY Vendor Control Register */
 #define DWC3_GUSB2PHYACC_NEWREGREQ     (1 << 25)
@@ -740,6 +749,9 @@ struct dwc3_scratchpad_array {
  * @maximum_speed: maximum speed requested (mainly for testing purposes)
  * @revision: revision register contents
  * @dr_mode: requested mode of operation
+ * @hsphy_mode: UTMI phy mode, one of following:
+ *             - USBPHY_INTERFACE_MODE_UTMI
+ *             - USBPHY_INTERFACE_MODE_UTMIW
  * @usb2_phy: pointer to USB2 PHY
  * @usb3_phy: pointer to USB3 PHY
  * @usb2_generic_phy: pointer to USB2 PHY
@@ -792,10 +804,19 @@ struct dwc3_scratchpad_array {
  * @del_phy_power_chg_quirk: set if we enable delay phy power change quirk
  * @lfps_filter_quirk: set if we enable LFPS filter quirk
  * @rx_detect_poll_quirk: set if we enable rx_detect to polling lfps quirk
+ * @dis_u3_autosuspend_quirk: set if the we disable usb3 autosuspend
  * @dis_u3_susphy_quirk: set if we disable usb3 suspend phy
  * @dis_u2_susphy_quirk: set if we disable usb2 suspend phy
  * @dis_enblslpm_quirk: set if we clear enblslpm in GUSB2PHYCFG,
  *                      disabling the suspend signal to the PHY.
+ * @dis_u2_freeclk_exists_quirk : set if we clear u2_freeclk_exists
+ *                     in GUSB2PHYCFG, specify that USB2 PHY doesn't
+ *                     provide a free-running PHY clock.
+ * @dis_del_phy_power_chg_quirk: set if we disable delay phy power
+ *                     change quirk.
+ * @xhci_slow_suspend_quirk: set if need an extraordinary delay to wait
+ *                     for xHC enter the Halted state after the Run/Stop
+ *                     (R/S) bit is cleared to '0'.
  * @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk
  * @tx_de_emphasis: Tx de-emphasis value
  *     0       - -6dB de-emphasis
@@ -842,6 +863,7 @@ struct dwc3 {
        size_t                  regs_size;
 
        enum usb_dr_mode        dr_mode;
+       enum usb_phy_interface  hsphy_mode;
 
        u32                     fladj;
        u32                     irq_gadget;
@@ -935,10 +957,14 @@ struct dwc3 {
        unsigned                del_phy_power_chg_quirk:1;
        unsigned                lfps_filter_quirk:1;
        unsigned                rx_detect_poll_quirk:1;
+       unsigned                dis_u3_autosuspend_quirk:1;
        unsigned                dis_u3_susphy_quirk:1;
        unsigned                dis_u2_susphy_quirk:1;
        unsigned                dis_enblslpm_quirk:1;
        unsigned                dis_rxdet_inp3_quirk:1;
+       unsigned                dis_u2_freeclk_exists_quirk:1;
+       unsigned                dis_del_phy_power_chg_quirk:1;
+       unsigned                xhci_slow_suspend_quirk:1;
 
        unsigned                tx_de_emphasis_quirk:1;
        unsigned                tx_de_emphasis:2;