UPSTREAM: usb: dwc3: core: add helper to extract trb type

[firefly-linux-kernel-4.4.55.git] / drivers / usb / dwc3 / core.h

diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index a3a196bd7d2c07acdf1978a0dda401aa1a49212c..85256ba70c1e134cd00fd0f31c7b12fbbb9fcaad 100644 (file)
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -153,6 +153,19 @@
 
 /* Bit fields */
 
+/* Global Debug Queue/FIFO Space Available Register */
+#define DWC3_GDBGFIFOSPACE_NUM(n)      ((n) & 0x1f)
+#define DWC3_GDBGFIFOSPACE_TYPE(n)     (((n) << 5) & 0x1e0)
+#define DWC3_GDBGFIFOSPACE_SPACE_AVAILABLE(n) (((n) >> 16) & 0xffff)
+
+#define DWC3_TXFIFOQ           1
+#define DWC3_RXFIFOQ           3
+#define DWC3_TXREQQ            5
+#define DWC3_RXREQQ            7
+#define DWC3_RXINFOQ           9
+#define DWC3_DESCFETCHQ                13
+#define DWC3_EVENTQ            15
+
 /* Global Configuration Register */
 #define DWC3_GCTL_PWRDNSCALE(n)        ((n) << 19)
 #define DWC3_GCTL_U2RSTECN     (1 << 16)
@@ -438,7 +451,6 @@ struct dwc3_event_buffer {
 #define DWC3_EP_DIRECTION_RX   false
 
 #define DWC3_TRB_NUM           256
-#define DWC3_TRB_MASK          (DWC3_TRB_NUM - 1)
 
 /**
  * struct dwc3_ep - device side endpoint representation
@@ -468,8 +480,6 @@ struct dwc3_ep {
 
        struct dwc3_trb         *trb_pool;
        dma_addr_t              trb_pool_dma;
-       u32                     trb_enqueue;
-       u32                     trb_dequeue;
        const struct usb_ss_ep_comp_descriptor *comp_desc;
        struct dwc3             *dwc;
 
@@ -485,6 +495,18 @@ struct dwc3_ep {
        /* This last one is specific to EP0 */
 #define DWC3_EP0_DIR_IN                (1 << 31)
 
+       /*
+        * IMPORTANT: we *know* we have 256 TRBs in our @trb_pool, so we will
+        * use a u8 type here. If anybody decides to increase number of TRBs to
+        * anything larger than 256 - I can't see why people would want to do
+        * this though - then this type needs to be changed.
+        *
+        * By using u8 types we ensure that our % operator when incrementing
+        * enqueue and dequeue get optimized away by the compiler.
+        */
+       u8                      trb_enqueue;
+       u8                      trb_dequeue;
+
        u8                      number;
        u8                      type;
        u8                      resource_index;
@@ -556,6 +578,7 @@ enum dwc3_link_state {
 #define DWC3_TRB_CTRL_IOC              (1 << 11)
 #define DWC3_TRB_CTRL_SID_SOFN(n)      (((n) & 0xffff) << 14)
 
+#define DWC3_TRBCTL_TYPE(n)            ((n) & (0x3f << 4))
 #define DWC3_TRBCTL_NORMAL             DWC3_TRB_CTRL_TRBCTL(1)
 #define DWC3_TRBCTL_CONTROL_SETUP      DWC3_TRB_CTRL_TRBCTL(2)
 #define DWC3_TRBCTL_CONTROL_STATUS2    DWC3_TRB_CTRL_TRBCTL(3)
@@ -639,8 +662,8 @@ struct dwc3_request {
        struct usb_request      request;
        struct list_head        list;
        struct dwc3_ep          *dep;
-       u32                     first_trb_index;
 
+       u8                      first_trb_index;
        u8                      epnum;
        struct dwc3_trb         *trb;
        dma_addr_t              trb_dma;
@@ -1032,6 +1055,7 @@ struct dwc3_gadget_ep_cmd_params {
 
 /* prototypes */
 void dwc3_set_mode(struct dwc3 *dwc, u32 mode);
+u32 dwc3_core_fifo_space(struct dwc3_ep *dep, u8 type);
 
 /* check whether we are on the DWC_usb31 core */
 static inline bool dwc3_is_usb31(struct dwc3 *dwc)