return retval;
}
- RTSX_READ_REG(chip, MS_TRANS_CFG, &val);
+ retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (val & (MS_INT_CMDNK | MS_INT_ERR | MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
rtsx_trace(chip);
return STATUS_FAIL;
static int ms_pull_ctl_disable(struct rtsx_chip *chip)
{
+ int retval;
+
if (CHECK_PID(chip, 0x5208)) {
- RTSX_WRITE_REG(chip, CARD_PULL_CTL1, 0xFF,
- MS_D1_PD | MS_D2_PD | MS_CLK_PD | MS_D6_PD);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL2, 0xFF,
- MS_D3_PD | MS_D0_PD | MS_BS_PD | XD_D4_PD);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL3, 0xFF,
- MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF,
- XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL5, 0xFF,
- MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL6, 0xFF,
- MS_D5_PD | MS_D4_PD);
+ retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF,
+ MS_D1_PD | MS_D2_PD | MS_CLK_PD | MS_D6_PD);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF,
+ MS_D3_PD | MS_D0_PD | MS_BS_PD | XD_D4_PD);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF,
+ MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF,
+ XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL5, 0xFF,
+ MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL6, 0xFF,
+ MS_D5_PD | MS_D4_PD);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
} else if (CHECK_PID(chip, 0x5288)) {
if (CHECK_BARO_PKG(chip, QFN)) {
- RTSX_WRITE_REG(chip, CARD_PULL_CTL1, 0xFF, 0x55);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL2, 0xFF, 0x55);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL3, 0xFF, 0x4B);
- RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF, 0x69);
+ retval = rtsx_write_register(chip, CARD_PULL_CTL1,
+ 0xFF, 0x55);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL2,
+ 0xFF, 0x55);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL3,
+ 0xFF, 0x4B);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_PULL_CTL4,
+ 0xFF, 0x69);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
}
}
return STATUS_FAIL;
}
} else {
- RTSX_WRITE_REG(chip, FPGA_PULL_CTL,
- FPGA_MS_PULL_CTL_BIT | 0x20, 0);
+ retval = rtsx_write_register(chip, FPGA_PULL_CTL,
+ FPGA_MS_PULL_CTL_BIT | 0x20, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
}
if (!chip->ft2_fast_mode) {
#endif
}
- RTSX_WRITE_REG(chip, CARD_OE, MS_OUTPUT_EN, MS_OUTPUT_EN);
+ retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN,
+ MS_OUTPUT_EN);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (chip->asic_code) {
- RTSX_WRITE_REG(chip, MS_CFG, 0xFF,
- SAMPLE_TIME_RISING | PUSH_TIME_DEFAULT |
- NO_EXTEND_TOGGLE | MS_BUS_WIDTH_1);
+ retval = rtsx_write_register(chip, MS_CFG, 0xFF,
+ SAMPLE_TIME_RISING | PUSH_TIME_DEFAULT | NO_EXTEND_TOGGLE | MS_BUS_WIDTH_1);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
} else {
- RTSX_WRITE_REG(chip, MS_CFG, 0xFF,
- SAMPLE_TIME_FALLING | PUSH_TIME_DEFAULT |
- NO_EXTEND_TOGGLE | MS_BUS_WIDTH_1);
+ retval = rtsx_write_register(chip, MS_CFG, 0xFF,
+ SAMPLE_TIME_FALLING | PUSH_TIME_DEFAULT | NO_EXTEND_TOGGLE | MS_BUS_WIDTH_1);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ }
+ retval = rtsx_write_register(chip, MS_TRANS_CFG, 0xFF,
+ NO_WAIT_INT | NO_AUTO_READ_INT_REG);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, CARD_STOP, MS_STOP | MS_CLR_ERR,
+ MS_STOP | MS_CLR_ERR);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
}
- RTSX_WRITE_REG(chip, MS_TRANS_CFG,
- 0xFF, NO_WAIT_INT | NO_AUTO_READ_INT_REG);
- RTSX_WRITE_REG(chip, CARD_STOP,
- MS_STOP | MS_CLR_ERR, MS_STOP | MS_CLR_ERR);
retval = ms_set_init_para(chip);
if (retval != STATUS_SUCCESS) {
return STATUS_FAIL;
}
- RTSX_READ_REG(chip, PPBUF_BASE2 + 2, &val);
+ retval = rtsx_read_register(chip, PPBUF_BASE2 + 2, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
dev_dbg(rtsx_dev(chip), "Type register: 0x%x\n", val);
if (val != 0x01) {
if (val != 0x02)
return STATUS_FAIL;
}
- RTSX_READ_REG(chip, PPBUF_BASE2 + 4, &val);
+ retval = rtsx_read_register(chip, PPBUF_BASE2 + 4, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
dev_dbg(rtsx_dev(chip), "Category register: 0x%x\n", val);
if (val != 0) {
ms_card->check_ms_flow = 1;
return STATUS_FAIL;
}
- RTSX_READ_REG(chip, PPBUF_BASE2 + 5, &val);
+ retval = rtsx_read_register(chip, PPBUF_BASE2 + 5, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
dev_dbg(rtsx_dev(chip), "Class register: 0x%x\n", val);
if (val == 0) {
- RTSX_READ_REG(chip, PPBUF_BASE2, &val);
+ retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (val & WRT_PRTCT)
chip->card_wp |= MS_CARD;
else
ms_card->ms_type |= TYPE_MSPRO;
- RTSX_READ_REG(chip, PPBUF_BASE2 + 3, &val);
+ retval = rtsx_read_register(chip, PPBUF_BASE2 + 3, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
dev_dbg(rtsx_dev(chip), "IF Mode register: 0x%x\n", val);
if (val == 0) {
ms_card->ms_type &= 0x0F;
return STATUS_FAIL;
}
- RTSX_WRITE_REG(chip, MS_CFG, 0x98,
- MS_BUS_WIDTH_8 | SAMPLE_TIME_FALLING);
+ retval = rtsx_write_register(chip, MS_CFG, 0x98,
+ MS_BUS_WIDTH_8 | SAMPLE_TIME_FALLING);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
ms_card->ms_type |= MS_8BIT;
retval = ms_set_init_para(chip);
if (retval != STATUS_SUCCESS) {
}
/* Switch MS-PRO into Parallel mode */
- RTSX_WRITE_REG(chip, MS_CFG, 0x18, MS_BUS_WIDTH_4);
- RTSX_WRITE_REG(chip, MS_CFG, PUSH_TIME_ODD, PUSH_TIME_ODD);
+ retval = rtsx_write_register(chip, MS_CFG, 0x18, MS_BUS_WIDTH_4);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, MS_CFG, PUSH_TIME_ODD,
+ PUSH_TIME_ODD);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
retval = ms_set_init_para(chip);
if (retval != STATUS_SUCCESS) {
return STATUS_FAIL;
}
- RTSX_READ_REG(chip, MS_TRANS_CFG, buf);
+ retval = rtsx_read_register(chip, MS_TRANS_CFG, buf);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (buf[0] & (MS_INT_CMDNK | MS_INT_ERR)) {
rtsx_trace(chip);
return STATUS_FAIL;
return STATUS_FAIL;
}
- RTSX_READ_REG(chip, PPBUF_BASE2, &val);
+ retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (val & BUF_FULL) {
retval = ms_send_cmd(chip, CLEAR_BUF, WAIT_INT);
return STATUS_FAIL;
}
- RTSX_READ_REG(chip, PPBUF_BASE2, &val);
+ retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (val & WRT_PRTCT)
chip->card_wp |= MS_CARD;
else
return STATUS_FAIL;
}
- RTSX_WRITE_REG(chip, PPBUF_BASE2, 0xFF, 0x88);
- RTSX_WRITE_REG(chip, PPBUF_BASE2 + 1, 0xFF, 0);
+ retval = rtsx_write_register(chip, PPBUF_BASE2, 0xFF, 0x88);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ retval = rtsx_write_register(chip, PPBUF_BASE2 + 1, 0xFF, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
retval = ms_transfer_tpc(chip, MS_TM_WRITE_BYTES, WRITE_REG, 1,
NO_WAIT_INT);
return STATUS_FAIL;
}
- RTSX_WRITE_REG(chip, MS_CFG, 0x58 | MS_NO_CHECK_INT,
- MS_BUS_WIDTH_4 | PUSH_TIME_ODD | MS_NO_CHECK_INT);
+ retval = rtsx_write_register(chip, MS_CFG,
+ 0x58 | MS_NO_CHECK_INT,
+ MS_BUS_WIDTH_4 | PUSH_TIME_ODD | MS_NO_CHECK_INT);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
ms_card->ms_type |= MS_4BIT;
}
else
trans_mode = MS_TM_AUTO_WRITE;
- RTSX_READ_REG(chip, MS_TRANS_CFG, &val);
+ retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (ms_card->seq_mode) {
if ((ms_card->pre_dir != srb->sc_data_direction)
return STATUS_FAIL;
}
- RTSX_READ_REG(chip, MS_TRANS_CFG, &tmp);
+ retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
rtsx_trace(chip);
return STATUS_FAIL;
}
} else {
- RTSX_WRITE_REG(chip, FPGA_PULL_CTL,
- FPGA_MS_PULL_CTL_BIT | 0x20, FPGA_MS_PULL_CTL_BIT);
+ retval = rtsx_write_register(chip, FPGA_PULL_CTL,
+ FPGA_MS_PULL_CTL_BIT | 0x20,
+ FPGA_MS_PULL_CTL_BIT);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
+ }
+ }
+ retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, 0);
+ if (retval) {
+ rtsx_trace(chip);
+ return retval;
}
- RTSX_WRITE_REG(chip, CARD_OE, MS_OUTPUT_EN, 0);
if (!chip->ft2_fast_mode) {
retval = card_power_off(chip, MS_CARD);
if (retval != STATUS_SUCCESS) {