Merge tag 'for-4.2' of git://git.infradead.org/battery-2.6

[firefly-linux-kernel-4.4.55.git] / drivers / scsi / ufs / ufshcd.h

diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h
index b47ff07698e80aa9119633568324e009da5217be..c40a0e78a6c4298cf437dc312f0a136dd78abfa9 100644 (file)
--- a/drivers/scsi/ufs/ufshcd.h
+++ b/drivers/scsi/ufs/ufshcd.h
@@ -246,6 +246,7 @@ struct ufs_pwr_mode_info {
  * @name: variant name
  * @init: called when the driver is initialized
  * @exit: called to cleanup everything done in init
+ * @get_ufs_hci_version: called to get UFS HCI version
  * @clk_scale_notify: notifies that clks are scaled up/down
  * @setup_clocks: called before touching any of the controller registers
  * @setup_regulators: called before accessing the host controller
@@ -263,6 +264,7 @@ struct ufs_hba_variant_ops {
        const char *name;
        int     (*init)(struct ufs_hba *);
        void    (*exit)(struct ufs_hba *);
+       u32     (*get_ufs_hci_version)(struct ufs_hba *);
        void    (*clk_scale_notify)(struct ufs_hba *);
        int     (*setup_clocks)(struct ufs_hba *, bool);
        int     (*setup_regulators)(struct ufs_hba *, bool);
@@ -417,11 +419,45 @@ struct ufs_hba {
        unsigned int irq;
        bool is_irq_enabled;
 
+       /* Interrupt aggregation support is broken */
+       #define UFSHCD_QUIRK_BROKEN_INTR_AGGR                   UFS_BIT(0)
+
        /*
         * delay before each dme command is required as the unipro
         * layer has shown instabilities
         */
-       #define UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS              UFS_BIT(0)
+       #define UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS              UFS_BIT(1)
+
+       /*
+        * If UFS host controller is having issue in processing LCC (Line
+        * Control Command) coming from device then enable this quirk.
+        * When this quirk is enabled, host controller driver should disable
+        * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
+        * attribute of device to 0).
+        */
+       #define UFSHCD_QUIRK_BROKEN_LCC                         UFS_BIT(2)
+
+       /*
+        * The attribute PA_RXHSUNTERMCAP specifies whether or not the
+        * inbound Link supports unterminated line in HS mode. Setting this
+        * attribute to 1 fixes moving to HS gear.
+        */
+       #define UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP            UFS_BIT(3)
+
+       /*
+        * This quirk needs to be enabled if the host contoller only allows
+        * accessing the peer dme attributes in AUTO mode (FAST AUTO or
+        * SLOW AUTO).
+        */
+       #define UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE          UFS_BIT(4)
+
+       /*
+        * This quirk needs to be enabled if the host contoller doesn't
+        * advertise the correct version in UFS_VER register. If this quirk
+        * is enabled, standard UFS host driver will call the vendor specific
+        * ops (get_ufs_hci_version) to get the correct version.
+        */
+       #define UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION             UFS_BIT(5)
 
        unsigned int quirks;    /* Deviations from standard UFSHCI spec. */
 
@@ -478,6 +514,12 @@ struct ufs_hba {
 #define UFSHCD_CAP_CLK_SCALING (1 << 2)
        /* Allow auto bkops to enabled during runtime suspend */
 #define UFSHCD_CAP_AUTO_BKOPS_SUSPEND (1 << 3)
+       /*
+        * This capability allows host controller driver to use the UFS HCI's
+        * interrupt aggregation capability.
+        * CAUTION: Enabling this might reduce overall UFS throughput.
+        */
+#define UFSHCD_CAP_INTR_AGGR (1 << 4)
 
        struct devfreq *devfreq;
        struct ufs_clk_scaling clk_scaling;
@@ -502,6 +544,15 @@ static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
        return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
 }
 
+static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
+{
+       if ((hba->caps & UFSHCD_CAP_INTR_AGGR) &&
+           !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR))
+               return true;
+       else
+               return false;
+}
+
 #define ufshcd_writel(hba, val, reg)   \
        writel((val), (hba)->mmio_base + (reg))
 #define ufshcd_readl(hba, reg) \