cxgb4/cxgb4vf/csiostor: Cleanup SGE and PCI related register defines

[firefly-linux-kernel-4.4.55.git] / drivers / scsi / csiostor / csio_wr.c

diff --git a/drivers/scsi/csiostor/csio_wr.c b/drivers/scsi/csiostor/csio_wr.c
index 221433f75ee67bc63d32621566b29409a7418fcb..12697c6f25196318f37040061e9f2e0ff91f53ad 100644 (file)
--- a/drivers/scsi/csiostor/csio_wr.c
+++ b/drivers/scsi/csiostor/csio_wr.c
@@ -1412,22 +1412,22 @@ csio_wr_get_sge(struct csio_hw *hw)
        for (i = 0; i < CSIO_SGE_FL_SIZE_REGS; i++)
                csio_get_flbuf_size(hw, sge, i);
 
-       timer_value_0_and_1 = csio_rd_reg32(hw, SGE_TIMER_VALUE_0_AND_1);
-       timer_value_2_and_3 = csio_rd_reg32(hw, SGE_TIMER_VALUE_2_AND_3);
-       timer_value_4_and_5 = csio_rd_reg32(hw, SGE_TIMER_VALUE_4_AND_5);
+       timer_value_0_and_1 = csio_rd_reg32(hw, SGE_TIMER_VALUE_0_AND_1_A);
+       timer_value_2_and_3 = csio_rd_reg32(hw, SGE_TIMER_VALUE_2_AND_3_A);
+       timer_value_4_and_5 = csio_rd_reg32(hw, SGE_TIMER_VALUE_4_AND_5_A);
 
        sge->timer_val[0] = (uint16_t)csio_core_ticks_to_us(hw,
-                                       TIMERVALUE0_GET(timer_value_0_and_1));
+                                       TIMERVALUE0_G(timer_value_0_and_1));
        sge->timer_val[1] = (uint16_t)csio_core_ticks_to_us(hw,
-                                       TIMERVALUE1_GET(timer_value_0_and_1));
+                                       TIMERVALUE1_G(timer_value_0_and_1));
        sge->timer_val[2] = (uint16_t)csio_core_ticks_to_us(hw,
-                                       TIMERVALUE2_GET(timer_value_2_and_3));
+                                       TIMERVALUE2_G(timer_value_2_and_3));
        sge->timer_val[3] = (uint16_t)csio_core_ticks_to_us(hw,
-                                       TIMERVALUE3_GET(timer_value_2_and_3));
+                                       TIMERVALUE3_G(timer_value_2_and_3));
        sge->timer_val[4] = (uint16_t)csio_core_ticks_to_us(hw,
-                                       TIMERVALUE4_GET(timer_value_4_and_5));
+                                       TIMERVALUE4_G(timer_value_4_and_5));
        sge->timer_val[5] = (uint16_t)csio_core_ticks_to_us(hw,
-                                       TIMERVALUE5_GET(timer_value_4_and_5));
+                                       TIMERVALUE5_G(timer_value_4_and_5));
 
        ingress_rx_threshold = csio_rd_reg32(hw, SGE_INGRESS_RX_THRESHOLD_A);
        sge->counter_val[0] = THRESHOLD_0_G(ingress_rx_threshold);
@@ -1513,19 +1513,19 @@ csio_wr_set_sge(struct csio_hw *hw)
                      SGE_INGRESS_RX_THRESHOLD_A);
 
        csio_wr_reg32(hw,
-                  TIMERVALUE0(csio_us_to_core_ticks(hw, sge->timer_val[0])) |
-                  TIMERVALUE1(csio_us_to_core_ticks(hw, sge->timer_val[1])),
-                  SGE_TIMER_VALUE_0_AND_1);
+                  TIMERVALUE0_V(csio_us_to_core_ticks(hw, sge->timer_val[0])) |
+                  TIMERVALUE1_V(csio_us_to_core_ticks(hw, sge->timer_val[1])),
+                  SGE_TIMER_VALUE_0_AND_1_A);
 
        csio_wr_reg32(hw,
-                  TIMERVALUE2(csio_us_to_core_ticks(hw, sge->timer_val[2])) |
-                  TIMERVALUE3(csio_us_to_core_ticks(hw, sge->timer_val[3])),
-                  SGE_TIMER_VALUE_2_AND_3);
+                  TIMERVALUE2_V(csio_us_to_core_ticks(hw, sge->timer_val[2])) |
+                  TIMERVALUE3_V(csio_us_to_core_ticks(hw, sge->timer_val[3])),
+                  SGE_TIMER_VALUE_2_AND_3_A);
 
        csio_wr_reg32(hw,
-                  TIMERVALUE4(csio_us_to_core_ticks(hw, sge->timer_val[4])) |
-                  TIMERVALUE5(csio_us_to_core_ticks(hw, sge->timer_val[5])),
-                  SGE_TIMER_VALUE_4_AND_5);
+                  TIMERVALUE4_V(csio_us_to_core_ticks(hw, sge->timer_val[4])) |
+                  TIMERVALUE5_V(csio_us_to_core_ticks(hw, sge->timer_val[5])),
+                  SGE_TIMER_VALUE_4_AND_5_A);
 
        csio_init_intr_coalesce_parms(hw);
 }