sh-pfc: sh7372: Add HDMI pin groups and functions

[firefly-linux-kernel-4.4.55.git] / drivers / pinctrl / sh-pfc / pfc-sh7372.c

diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
index 9545b3c6013cf00d951b2940b7c2573d200f7a91..73b9e255f777dd66adfcaf59469373841fca4cc2 100644 (file)
--- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
@@ -1029,6 +1029,163 @@ static const unsigned int bsc_wait_pins[] = {
 static const unsigned int bsc_wait_mux[] = {
        WAIT_MARK,
 };
+/* - CEU -------------------------------------------------------------------- */
+static const unsigned int ceu_data_0_7_pins[] = {
+       /* D[0:7] */
+       102, 103, 104, 105, 106, 107, 108, 109,
+};
+static const unsigned int ceu_data_0_7_mux[] = {
+       VIO_D0_MARK, VIO_D1_MARK, VIO_D2_MARK, VIO_D3_MARK,
+       VIO_D4_MARK, VIO_D5_MARK, VIO_D6_MARK, VIO_D7_MARK,
+};
+static const unsigned int ceu_data_8_15_pins[] = {
+       /* D[8:15] */
+       110, 111, 112, 113, 114, 115, 116, 117,
+};
+static const unsigned int ceu_data_8_15_mux[] = {
+       VIO_D8_MARK, VIO_D9_MARK, VIO_D10_MARK, VIO_D11_MARK,
+       VIO_D12_MARK, VIO_D13_MARK, VIO_D14_MARK, VIO_D15_MARK,
+};
+static const unsigned int ceu_clk_0_pins[] = {
+       /* CKO */
+       120,
+};
+static const unsigned int ceu_clk_0_mux[] = {
+       VIO_CKO_MARK,
+};
+static const unsigned int ceu_clk_1_pins[] = {
+       /* CKO */
+       16,
+};
+static const unsigned int ceu_clk_1_mux[] = {
+       VIO_CKO1_MARK,
+};
+static const unsigned int ceu_clk_2_pins[] = {
+       /* CKO */
+       17,
+};
+static const unsigned int ceu_clk_2_mux[] = {
+       VIO_CKO2_MARK,
+};
+static const unsigned int ceu_sync_pins[] = {
+       /* CLK, VD, HD */
+       118, 100, 101,
+};
+static const unsigned int ceu_sync_mux[] = {
+       VIO_CLK_MARK, VIO_VD_MARK, VIO_HD_MARK,
+};
+static const unsigned int ceu_field_pins[] = {
+       /* FIELD */
+       119,
+};
+static const unsigned int ceu_field_mux[] = {
+       VIO_FIELD_MARK,
+};
+/* - FLCTL ------------------------------------------------------------------ */
+static const unsigned int flctl_data_pins[] = {
+       /* NAF[0:15] */
+       46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61,
+};
+static const unsigned int flctl_data_mux[] = {
+       D0_NAF0_MARK, D1_NAF1_MARK, D2_NAF2_MARK, D3_NAF3_MARK,
+       D4_NAF4_MARK, D5_NAF5_MARK, D6_NAF6_MARK, D7_NAF7_MARK,
+       D8_NAF8_MARK, D9_NAF9_MARK, D10_NAF10_MARK, D11_NAF11_MARK,
+       D12_NAF12_MARK, D13_NAF13_MARK, D14_NAF14_MARK, D15_NAF15_MARK,
+};
+static const unsigned int flctl_ce0_pins[] = {
+       /* CE */
+       68,
+};
+static const unsigned int flctl_ce0_mux[] = {
+       FCE0_MARK,
+};
+static const unsigned int flctl_ce1_pins[] = {
+       /* CE */
+       66,
+};
+static const unsigned int flctl_ce1_mux[] = {
+       FCE1_MARK,
+};
+static const unsigned int flctl_ctrl_pins[] = {
+       /* FCDE, FOE, FSC, FWE, FRB */
+       24, 23, 69, 70, 73,
+};
+static const unsigned int flctl_ctrl_mux[] = {
+       A5_FCDE_MARK, A4_FOE_MARK, RD_FSC_MARK, WE0_FWE_MARK, FRB_MARK,
+};
+/* - FSIA ------------------------------------------------------------------- */
+static const unsigned int fsia_mclk_in_pins[] = {
+       /* CK */
+       4,
+};
+static const unsigned int fsia_mclk_in_mux[] = {
+       FSIACK_MARK,
+};
+static const unsigned int fsia_mclk_out_pins[] = {
+       /* OMC */
+       8,
+};
+static const unsigned int fsia_mclk_out_mux[] = {
+       FSIAOMC_MARK,
+};
+static const unsigned int fsia_sclk_in_pins[] = {
+       /* ILR, IBT */
+       5, 6,
+};
+static const unsigned int fsia_sclk_in_mux[] = {
+       FSIAILR_MARK, FSIAIBT_MARK,
+};
+static const unsigned int fsia_sclk_out_pins[] = {
+       /* OLR, OBT */
+       9, 10,
+};
+static const unsigned int fsia_sclk_out_mux[] = {
+       FSIAOLR_MARK, FSIAOBT_MARK,
+};
+static const unsigned int fsia_data_in_pins[] = {
+       /* ISLD */
+       7,
+};
+static const unsigned int fsia_data_in_mux[] = {
+       FSIAISLD_MARK,
+};
+static const unsigned int fsia_data_out_pins[] = {
+       /* OSLD */
+       11,
+};
+static const unsigned int fsia_data_out_mux[] = {
+       FSIAOSLD_MARK,
+};
+static const unsigned int fsia_spdif_0_pins[] = {
+       /* SPDIF */
+       11,
+};
+static const unsigned int fsia_spdif_0_mux[] = {
+       FSIASPDIF_11_MARK,
+};
+static const unsigned int fsia_spdif_1_pins[] = {
+       /* SPDIF */
+       15,
+};
+static const unsigned int fsia_spdif_1_mux[] = {
+       FSIASPDIF_15_MARK,
+};
+/* - FSIB ------------------------------------------------------------------- */
+static const unsigned int fsib_mclk_in_pins[] = {
+       /* CK */
+       4,
+};
+static const unsigned int fsib_mclk_in_mux[] = {
+       FSIBCK_MARK,
+};
+/* - HDMI ------------------------------------------------------------------- */
+static const unsigned int hdmi_pins[] = {
+       /* HPD, CEC */
+       169, 170,
+};
+static const unsigned int hdmi_mux[] = {
+       HDMI_HPD_MARK, HDMI_CEC_MARK,
+};
 /* - MMCIF ------------------------------------------------------------------ */
 static const unsigned int mmc0_data1_0_pins[] = {
        /* D[0] */
@@ -1183,6 +1340,27 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
        SH_PFC_PIN_GROUP(bsc_rd_we16),
        SH_PFC_PIN_GROUP(bsc_bs),
        SH_PFC_PIN_GROUP(bsc_rdwr),
+       SH_PFC_PIN_GROUP(ceu_data_0_7),
+       SH_PFC_PIN_GROUP(ceu_data_8_15),
+       SH_PFC_PIN_GROUP(ceu_clk_0),
+       SH_PFC_PIN_GROUP(ceu_clk_1),
+       SH_PFC_PIN_GROUP(ceu_clk_2),
+       SH_PFC_PIN_GROUP(ceu_sync),
+       SH_PFC_PIN_GROUP(ceu_field),
+       SH_PFC_PIN_GROUP(flctl_data),
+       SH_PFC_PIN_GROUP(flctl_ce0),
+       SH_PFC_PIN_GROUP(flctl_ce1),
+       SH_PFC_PIN_GROUP(flctl_ctrl),
+       SH_PFC_PIN_GROUP(fsia_mclk_in),
+       SH_PFC_PIN_GROUP(fsia_mclk_out),
+       SH_PFC_PIN_GROUP(fsia_sclk_in),
+       SH_PFC_PIN_GROUP(fsia_sclk_out),
+       SH_PFC_PIN_GROUP(fsia_data_in),
+       SH_PFC_PIN_GROUP(fsia_data_out),
+       SH_PFC_PIN_GROUP(fsia_spdif_0),
+       SH_PFC_PIN_GROUP(fsia_spdif_1),
+       SH_PFC_PIN_GROUP(fsib_mclk_in),
+       SH_PFC_PIN_GROUP(hdmi),
        SH_PFC_PIN_GROUP(mmc0_data1_0),
        SH_PFC_PIN_GROUP(mmc0_data4_0),
        SH_PFC_PIN_GROUP(mmc0_data8_0),
@@ -1219,6 +1397,42 @@ static const char * const bsc_groups[] = {
        "bsc_rdwr",
 };
 
+static const char * const ceu_groups[] = {
+       "ceu_data_0_7",
+       "ceu_data_8_15",
+       "ceu_clk_0",
+       "ceu_clk_1",
+       "ceu_clk_2",
+       "ceu_sync",
+       "ceu_field",
+};
+
+static const char * const flctl_groups[] = {
+       "flctl_data",
+       "flctl_ce0",
+       "flctl_ce1",
+       "flctl_ctrl",
+};
+
+static const char * const fsia_groups[] = {
+       "fsia_mclk_in",
+       "fsia_mclk_out",
+       "fsia_sclk_in",
+       "fsia_sclk_out",
+       "fsia_data_in",
+       "fsia_data_out",
+       "fsia_spdif_0",
+       "fsia_spdif_1",
+};
+
+static const char * const fsib_groups[] = {
+       "fsib_mclk_in",
+};
+
+static const char * const hdmi_groups[] = {
+       "hdmi",
+};
+
 static const char * const mmc0_groups[] = {
        "mmc0_data1_0",
        "mmc0_data4_0",
@@ -1252,6 +1466,11 @@ static const char * const sdhi2_groups[] = {
 
 static const struct sh_pfc_function pinmux_functions[] = {
        SH_PFC_FUNCTION(bsc),
+       SH_PFC_FUNCTION(ceu),
+       SH_PFC_FUNCTION(flctl),
+       SH_PFC_FUNCTION(fsia),
+       SH_PFC_FUNCTION(fsib),
+       SH_PFC_FUNCTION(hdmi),
        SH_PFC_FUNCTION(mmc0),
        SH_PFC_FUNCTION(sdhi0),
        SH_PFC_FUNCTION(sdhi1),