--- /dev/null
+#ifndef __HAL_TXBF_8192E_H__\r
+#define __HAL_TXBF_8192E_H__\r
+\r
+#if (RTL8192E_SUPPORT == 1)\r
+#if (BEAMFORMING_SUPPORT == 1)\r
+\r
+VOID\r
+HalTxbf8192E_setNDPArate(\r
+ IN PVOID pDM_VOID,\r
+ IN u1Byte BW,\r
+ IN u1Byte Rate\r
+);\r
+\r
+VOID\r
+HalTxbf8192E_Enter(\r
+ IN PVOID pDM_VOID,\r
+ IN u1Byte Idx\r
+ );\r
+\r
+\r
+VOID\r
+HalTxbf8192E_Leave(\r
+ IN PVOID pDM_VOID,\r
+ IN u1Byte Idx\r
+ );\r
+\r
+\r
+VOID\r
+HalTxbf8192E_Status(\r
+ IN PVOID pDM_VOID,\r
+ IN u1Byte Idx\r
+ );\r
+\r
+\r
+VOID\r
+HalTxbf8192E_FwTxBF(\r
+ IN PVOID pDM_VOID,\r
+ IN u1Byte Idx\r
+ );\r
+#else\r
+\r
+#define HalTxbf8192E_setNDPArate(pDM_VOID, BW, Rate)\r
+#define HalTxbf8192E_Enter(pDM_VOID, Idx)\r
+#define HalTxbf8192E_Leave(pDM_VOID, Idx)\r
+#define HalTxbf8192E_Status(pDM_VOID, Idx)\r
+#define HalTxbf8192E_FwTxBF(pDM_VOID, Idx)\r
+\r
+#endif\r
+\r
+#else\r
+\r
+#define HalTxbf8192E_setNDPArate(pDM_VOID, BW, Rate)\r
+#define HalTxbf8192E_Enter(pDM_VOID, Idx)\r
+#define HalTxbf8192E_Leave(pDM_VOID, Idx)\r
+#define HalTxbf8192E_Status(pDM_VOID, Idx)\r
+#define HalTxbf8192E_FwTxBF(pDM_VOID, Idx)\r
+\r
+#endif\r
+\r
+#endif\r
+\r