net: wireless: rockchip: add rtl8822be pcie wifi driver

[firefly-linux-kernel-4.4.55.git] / drivers / net / wireless / rockchip_wlan / rtl8822be / hal / phydm / phydm_regdefine11ac.h

diff --git a/drivers/net/wireless/rockchip_wlan/rtl8822be/hal/phydm/phydm_regdefine11ac.h b/drivers/net/wireless/rockchip_wlan/rtl8822be/hal/phydm/phydm_regdefine11ac.h
new file mode 100644 (file)
index 0000000..854ec3c
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/rtl8822be/hal/phydm/phydm_regdefine11ac.h
@@ -0,0 +1,94 @@
+/******************************************************************************\r
+ *\r
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.\r
+ *                                        \r
+ * This program is free software; you can redistribute it and/or modify it\r
+ * under the terms of version 2 of the GNU General Public License as\r
+ * published by the Free Software Foundation.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but WITHOUT\r
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ * more details.\r
+ *\r
+ * You should have received a copy of the GNU General Public License along with\r
+ * this program; if not, write to the Free Software Foundation, Inc.,\r
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA\r
+ *\r
+ *\r
+ ******************************************************************************/\r
+ \r
+#ifndef        __ODM_REGDEFINE11AC_H__\r
+#define __ODM_REGDEFINE11AC_H__\r
+\r
+//2 RF REG LIST\r
+\r
+\r
+\r
+//2 BB REG LIST\r
+//PAGE 8\r
+#define        ODM_REG_CCK_RPT_FORMAT_11AC     0x804\r
+#define        ODM_REG_BB_RX_PATH_11AC                 0x808\r
+#define        ODM_REG_BB_TX_PATH_11AC                 0x80c\r
+#define        ODM_REG_BB_ATC_11AC                             0x860\r
+#define        ODM_REG_EDCCA_POWER_CAL         0x8dc\r
+#define        ODM_REG_DBG_RPT_11AC                    0x8fc\r
+//PAGE 9\r
+#define        ODM_REG_EDCCA_DOWN_OPT                  0x900\r
+#define        ODM_REG_ACBB_EDCCA_ENHANCE              0x944\r
+#define        ODM_ADC_TRIGGER_Jaguar2                 0x95C   /*ADC sample mode*/\r
+#define        ODM_REG_OFDM_FA_RST_11AC                0x9A4\r
+#define        ODM_REG_CCX_PERIOD_11AC                 0x990\r
+#define        ODM_REG_NHM_TH9_TH10_11AC               0x994\r
+#define        ODM_REG_CLM_11AC                                        0x994\r
+#define        ODM_REG_NHM_TH3_TO_TH0_11AC     0x998\r
+#define        ODM_REG_NHM_TH7_TO_TH4_11AC     0x99c\r
+#define        ODM_REG_NHM_TH8_11AC                    0x9a0\r
+#define        ODM_REG_NHM_9E8_11AC                    0x9e8\r
+#define        ODM_REG_CSI_CONTENT_VALUE               0x9b4\r
+//PAGE A\r
+#define        ODM_REG_CCK_CCA_11AC                    0xA0A\r
+#define        ODM_REG_CCK_FA_RST_11AC                 0xA2C\r
+#define        ODM_REG_CCK_FA_11AC                             0xA5C\r
+//PAGE B\r
+#define        ODM_REG_RST_RPT_11AC                            0xB58\r
+//PAGE C\r
+#define        ODM_REG_TRMUX_11AC                              0xC08\r
+#define        ODM_REG_IGI_A_11AC                              0xC50\r
+//PAGE E\r
+#define        ODM_REG_IGI_B_11AC                              0xE50\r
+#define        ODM_REG_TRMUX_11AC_B                    0xE08\r
+//PAGE F\r
+#define        ODM_REG_CCK_CRC32_CNT_11AC              0xF04\r
+#define        ODM_REG_CCK_CCA_CNT_11AC                0xF08\r
+#define        ODM_REG_VHT_CRC32_CNT_11AC              0xF0c\r
+#define        ODM_REG_HT_CRC32_CNT_11AC               0xF10\r
+#define        ODM_REG_OFDM_CRC32_CNT_11AC     0xF14\r
+#define        ODM_REG_OFDM_FA_11AC                    0xF48\r
+#define        ODM_REG_RPT_11AC                                        0xfa0\r
+#define        ODM_REG_CLM_RESULT_11AC                 0xfa4\r
+#define        ODM_REG_NHM_CNT_11AC                    0xfa8\r
+#define ODM_REG_NHM_DUR_READY_11AC      0xfb4\r
+\r
+#define        ODM_REG_NHM_CNT7_TO_CNT4_11AC   0xfac\r
+#define        ODM_REG_NHM_CNT11_TO_CNT8_11AC  0xfb0\r
+#define        ODM_REG_OFDM_FA_TYPE2_11AC              0xFD0\r
+//PAGE 18\r
+#define        ODM_REG_IGI_C_11AC                              0x1850\r
+//PAGE 1A\r
+#define        ODM_REG_IGI_D_11AC                              0x1A50\r
+\r
+//2 MAC REG LIST\r
+#define        ODM_REG_RESP_TX_11AC                            0x6D8\r
+\r
+\r
+\r
+//DIG Related\r
+#define        ODM_BIT_IGI_11AC                                        0xFFFFFFFF\r
+#define        ODM_BIT_CCK_RPT_FORMAT_11AC             BIT16\r
+#define        ODM_BIT_BB_RX_PATH_11AC                 0xF\r
+#define        ODM_BIT_BB_TX_PATH_11AC                 0xF\r
+#define        ODM_BIT_BB_ATC_11AC                             BIT14\r
+\r
+#endif\r
+\r