net: wireless: rockchip: add rtl8822be pcie wifi driver
[firefly-linux-kernel-4.4.55.git] / drivers / net / wireless / rockchip_wlan / rtl8822be / hal / phydm / phydm_pathdiv.h
diff --git a/drivers/net/wireless/rockchip_wlan/rtl8822be/hal/phydm/phydm_pathdiv.h b/drivers/net/wireless/rockchip_wlan/rtl8822be/hal/phydm/phydm_pathdiv.h
new file mode 100644 (file)
index 0000000..63a2641
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@@ -0,0 +1,324 @@
+/******************************************************************************\r
+ *\r
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.\r
+ *                                        \r
+ * This program is free software; you can redistribute it and/or modify it\r
+ * under the terms of version 2 of the GNU General Public License as\r
+ * published by the Free Software Foundation.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but WITHOUT\r
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ * more details.\r
+ *\r
+ * You should have received a copy of the GNU General Public License along with\r
+ * this program; if not, write to the Free Software Foundation, Inc.,\r
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA\r
+ *\r
+ *\r
+ ******************************************************************************/\r
\r
+#ifndef        __PHYDMPATHDIV_H__\r
+#define    __PHYDMPATHDIV_H__\r
+/*#define PATHDIV_VERSION "2.0" //2014.11.04*/\r
+#define PATHDIV_VERSION        "3.1" /*2015.07.29 by YuChen*/\r
+\r
+#if(defined(CONFIG_PATH_DIVERSITY))\r
+#define USE_PATH_A_AS_DEFAULT_ANT   //for 8814 dynamic TX path selection\r
+\r
+#define        NUM_RESET_DTP_PERIOD 5\r
+#define        ANT_DECT_RSSI_TH 3 \r
+\r
+#define PATH_A 1\r
+#define PATH_B 2\r
+#define PATH_C 3\r
+#define PATH_D 4\r
+\r
+#define PHYDM_AUTO_PATH        0\r
+#define PHYDM_FIX_PATH         1\r
+\r
+#define NUM_CHOOSE2_FROM4 6\r
+#define NUM_CHOOSE3_FROM4 4\r
+\r
+\r
+#define                PHYDM_A          BIT0\r
+#define                PHYDM_B          BIT1\r
+#define                PHYDM_C          BIT2\r
+#define                PHYDM_D          BIT3\r
+#define                PHYDM_AB         (BIT0 | BIT1)  // 0\r
+#define                PHYDM_AC         (BIT0 | BIT2)  // 1\r
+#define                PHYDM_AD         (BIT0 | BIT3)  // 2\r
+#define                PHYDM_BC         (BIT1 | BIT2)  // 3\r
+#define                PHYDM_BD         (BIT1 | BIT3)  // 4\r
+#define                PHYDM_CD         (BIT2 | BIT3)  // 5\r
+\r
+#define                PHYDM_ABC        (BIT0 | BIT1 | BIT2) /* 0*/\r
+#define                PHYDM_ABD        (BIT0 | BIT1 | BIT3) /* 1*/\r
+#define                PHYDM_ACD        (BIT0 | BIT2 | BIT3) /* 2*/\r
+#define                PHYDM_BCD        (BIT1 | BIT2 | BIT3) /* 3*/\r
+\r
+#define                PHYDM_ABCD       (BIT0 | BIT1 | BIT2 | BIT3)\r
+\r
+\r
+typedef enum dtp_state\r
+{\r
+       PHYDM_DTP_INIT=1,\r
+       PHYDM_DTP_RUNNING_1\r
+\r
+}PHYDM_DTP_STATE;\r
+\r
+typedef enum path_div_type\r
+{\r
+       PHYDM_2R_PATH_DIV = 1,\r
+       PHYDM_4R_PATH_DIV = 2\r
+}PHYDM_PATH_DIV_TYPE;\r
+\r
+VOID\r
+phydm_process_rssi_for_path_div(       \r
+       IN OUT          PVOID                   pDM_VOID,       \r
+       IN                      PVOID                   p_phy_info_void,\r
+       IN                      PVOID                   p_pkt_info_void\r
+       );\r
+\r
+typedef struct _ODM_PATH_DIVERSITY_\r
+{\r
+       u1Byte  RespTxPath;\r
+       u1Byte  PathSel[ODM_ASSOCIATE_ENTRY_NUM];\r
+       u4Byte  PathA_Sum[ODM_ASSOCIATE_ENTRY_NUM];\r
+       u4Byte  PathB_Sum[ODM_ASSOCIATE_ENTRY_NUM];\r
+       u2Byte  PathA_Cnt[ODM_ASSOCIATE_ENTRY_NUM];\r
+       u2Byte  PathB_Cnt[ODM_ASSOCIATE_ENTRY_NUM];\r
+       u1Byte  path_div_type;\r
+  #if RTL8814A_SUPPORT\r
+       \r
+       u4Byte  path_a_sum_all;\r
+       u4Byte  path_b_sum_all;\r
+       u4Byte  path_c_sum_all;\r
+       u4Byte  path_d_sum_all;\r
+\r
+       u4Byte  path_a_cnt_all;\r
+       u4Byte  path_b_cnt_all;\r
+       u4Byte  path_c_cnt_all;\r
+       u4Byte  path_d_cnt_all;\r
+       \r
+       u1Byte  dtp_period;\r
+       BOOLEAN bBecomeLinked;\r
+       BOOLEAN is_u3_mode;\r
+       u1Byte  num_tx_path;\r
+       u1Byte  default_path;\r
+       u1Byte  num_candidate;\r
+       u1Byte  ant_candidate_1;\r
+       u1Byte  ant_candidate_2;\r
+       u1Byte  ant_candidate_3;\r
+       u1Byte     dtp_state;\r
+       u1Byte  dtp_check_patha_counter;\r
+       BOOLEAN fix_path_bfer;\r
+       u1Byte  search_space_2[NUM_CHOOSE2_FROM4];\r
+       u1Byte  search_space_3[NUM_CHOOSE3_FROM4];\r
+       \r
+       u1Byte  pre_tx_path;\r
+       u1Byte  use_path_a_as_default_ant;\r
+       BOOLEAN is_pathA_exist;\r
+\r
+  #endif\r
+}PATHDIV_T, *pPATHDIV_T;\r
+\r
+\r
+#endif //#if(defined(CONFIG_PATH_DIVERSITY))\r
+\r
+VOID\r
+phydm_c2h_dtp_handler(\r
+        IN     PVOID   pDM_VOID,\r
+        IN     pu1Byte   CmdBuf,\r
+        IN     u1Byte  CmdLen\r
+       );\r
+\r
+VOID\r
+odm_PathDiversityInit(\r
+       IN      PVOID   pDM_VOID\r
+       );\r
+\r
+VOID\r
+odm_PathDiversity(\r
+       IN      PVOID   pDM_VOID\r
+       );\r
+\r
+VOID\r
+odm_pathdiv_debug(\r
+       IN              PVOID           pDM_VOID,\r
+       IN              u4Byte          *const dm_value,\r
+       IN              u4Byte          *_used,\r
+       OUT             char            *output,\r
+       IN              u4Byte          *_out_len\r
+       );\r
+\r
+\r
+\r
+//1 [OLD IC]--------------------------------------------------------------------------------\r
+\r
+\r
+\r
+\r
+\r
+\r
+#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) \r
+\r
+//#define   PATHDIV_ENABLE      1\r
+#define dm_PathDiv_RSSI_Check  ODM_PathDivChkPerPktRssi\r
+#define PathDivCheckBeforeLink8192C    ODM_PathDiversityBeforeLink92C\r
+\r
+\r
+\r
+\r
+typedef struct _PathDiv_Parameter_define_\r
+{\r
+       u4Byte org_5g_RegE30;\r
+       u4Byte org_5g_RegC14;\r
+       u4Byte org_5g_RegCA0;\r
+       u4Byte swt_5g_RegE30;\r
+       u4Byte swt_5g_RegC14;\r
+       u4Byte swt_5g_RegCA0;\r
+       //for 2G IQK information\r
+       u4Byte org_2g_RegC80;\r
+       u4Byte org_2g_RegC4C;\r
+       u4Byte org_2g_RegC94;\r
+       u4Byte org_2g_RegC14;\r
+       u4Byte org_2g_RegCA0;\r
+\r
+       u4Byte swt_2g_RegC80;\r
+       u4Byte swt_2g_RegC4C;\r
+       u4Byte swt_2g_RegC94;\r
+       u4Byte swt_2g_RegC14;\r
+       u4Byte swt_2g_RegCA0;\r
+}PATHDIV_PARA,*pPATHDIV_PARA;\r
+\r
+VOID   \r
+odm_PathDiversityInit_92C(\r
+       IN      PADAPTER        Adapter\r
+       );\r
+\r
+VOID   \r
+odm_2TPathDiversityInit_92C(\r
+       IN      PADAPTER        Adapter\r
+       );\r
+\r
+VOID   \r
+odm_1TPathDiversityInit_92C(   \r
+       IN      PADAPTER        Adapter\r
+       );\r
+\r
+BOOLEAN\r
+odm_IsConnected_92C(\r
+       IN      PADAPTER        Adapter\r
+       );\r
+\r
+BOOLEAN \r
+ODM_PathDiversityBeforeLink92C(\r
+       //IN    PADAPTER        Adapter\r
+       IN              PDM_ODM_T               pDM_Odm\r
+       );\r
+\r
+VOID   \r
+odm_PathDiversityAfterLink_92C(\r
+       IN      PADAPTER        Adapter\r
+       );\r
+\r
+VOID\r
+odm_SetRespPath_92C(   \r
+       IN      PADAPTER        Adapter,        \r
+       IN      u1Byte  DefaultRespPath\r
+       );\r
+\r
+VOID   \r
+odm_OFDMTXPathDiversity_92C(\r
+       IN      PADAPTER        Adapter\r
+       );\r
+\r
+VOID   \r
+odm_CCKTXPathDiversity_92C(    \r
+       IN      PADAPTER        Adapter\r
+       );\r
+\r
+VOID   \r
+odm_ResetPathDiversity_92C(    \r
+       IN      PADAPTER        Adapter\r
+       );\r
+\r
+VOID\r
+odm_CCKTXPathDiversityCallback(\r
+       PRT_TIMER               pTimer\r
+       );\r
+\r
+VOID\r
+odm_CCKTXPathDiversityWorkItemCallback(\r
+       IN PVOID            pContext\r
+       );\r
+\r
+VOID\r
+odm_PathDivChkAntSwitchCallback(\r
+       PRT_TIMER               pTimer\r
+       );\r
+\r
+VOID\r
+odm_PathDivChkAntSwitchWorkitemCallback(\r
+       IN PVOID            pContext\r
+       );\r
+\r
+\r
+VOID \r
+odm_PathDivChkAntSwitch(\r
+       PDM_ODM_T    pDM_Odm\r
+       );\r
+\r
+VOID\r
+ODM_CCKPathDiversityChkPerPktRssi(\r
+       PADAPTER                Adapter,\r
+       BOOLEAN                 bIsDefPort,\r
+       BOOLEAN                 bMatchBSSID,\r
+       PRT_WLAN_STA    pEntry,\r
+       PRT_RFD                 pRfd,\r
+       pu1Byte                 pDesc\r
+       );\r
+\r
+VOID \r
+ODM_PathDivChkPerPktRssi(\r
+       PADAPTER                Adapter,\r
+       BOOLEAN                 bIsDefPort,\r
+       BOOLEAN                 bMatchBSSID,\r
+       PRT_WLAN_STA    pEntry,\r
+       PRT_RFD                 pRfd    \r
+       );\r
+\r
+VOID\r
+ODM_PathDivRestAfterLink(\r
+       IN      PDM_ODM_T               pDM_Odm\r
+       );\r
+\r
+VOID\r
+ODM_FillTXPathInTXDESC(\r
+               IN      PADAPTER        Adapter,\r
+               IN      PRT_TCB         pTcb,\r
+               IN      pu1Byte         pDesc\r
+       );\r
+\r
+VOID\r
+odm_PathDivInit_92D(\r
+       IN      PDM_ODM_T       pDM_Odm\r
+       );\r
+\r
+u1Byte\r
+odm_SwAntDivSelectScanChnl(\r
+       IN      PADAPTER        Adapter\r
+       );\r
+\r
+VOID\r
+odm_SwAntDivConstructScanChnl(\r
+       IN      PADAPTER        Adapter,\r
+       IN      u1Byte          ScanChnl\r
+       );\r
+       \r
+ #endif       //#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN)) \r
\r
\r
+ #endif                 //#ifndef  __ODMPATHDIV_H__\r
+\r