net: wireless: rockchip: add rtl8822be pcie wifi driver

[firefly-linux-kernel-4.4.55.git] / drivers / net / wireless / rockchip_wlan / rtl8822be / hal / phydm / phydm_iqk.h

diff --git a/drivers/net/wireless/rockchip_wlan/rtl8822be/hal/phydm/phydm_iqk.h b/drivers/net/wireless/rockchip_wlan/rtl8822be/hal/phydm/phydm_iqk.h
new file mode 100644 (file)
index 0000000..a059fe4
--- /dev/null
+++ b/drivers/net/wireless/rockchip_wlan/rtl8822be/hal/phydm/phydm_iqk.h
@@ -0,0 +1,62 @@
+/******************************************************************************\r
+ *\r
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.\r
+ *                                        \r
+ * This program is free software; you can redistribute it and/or modify it\r
+ * under the terms of version 2 of the GNU General Public License as\r
+ * published by the Free Software Foundation.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but WITHOUT\r
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ * more details.\r
+ *\r
+ * You should have received a copy of the GNU General Public License along with\r
+ * this program; if not, write to the Free Software Foundation, Inc.,\r
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA\r
+ *\r
+ *\r
+ ******************************************************************************/\r
+\r
+#ifndef        __PHYDMIQK_H__\r
+#define __PHYDMIQK_H__\r
+\r
+/*--------------------------Define Parameters-------------------------------*/\r
+#define        LOK_delay 1\r
+#define        WBIQK_delay 10\r
+#define        TX_IQK 0\r
+#define        RX_IQK 1\r
+#define        TXIQK 0\r
+#define        RXIQK1 1\r
+#define        RXIQK2 2\r
+\r
+#define        NUM 4   \r
+/*---------------------------End Define Parameters-------------------------------*/\r
+\r
+typedef struct _IQK_INFORMATION {\r
+       BOOLEAN         LOK_fail[NUM];\r
+       BOOLEAN         IQK_fail[2][NUM];\r
+       u4Byte          IQC_Matrix[2][NUM];\r
+       u1Byte      IQKtimes;\r
+       u4Byte          RFReg18;\r
+       u4Byte          lna_idx;\r
+//     BOOLEAN         rxiqk_finish[4];\r
+       u1Byte          rxiqk_step;\r
+       u1Byte          tmp1bcc;\r
+       \r
+       u4Byte          IQK_Channel[2];\r
+       BOOLEAN         IQK_fail_report[2][4][2]; /*channel/path/TRX(TX:0, RX:1) */\r
+       u4Byte          IQK_CFIR_real[2][4][2][8]; /*channel / path / TRX(TX:0, RX:1) / CFIR_real*/\r
+       u4Byte          IQK_CFIR_imag[2][4][2][8]; /*channel / path / TRX(TX:0, RX:1) / CFIR_imag*/\r
+       u1Byte          retry_count[2][4][3]; /* channel / path / (TXK:0, RXK1:1, RXK2:2) */\r
+       u1Byte          gs_retry_count[2][4][2]; /* channel / path / (GSRXK1:0, GSRXK2:1) */\r
+       u1Byte          RXIQK_fail_code[2][4]; /* channel / path 0:SRXK1 fail, 1:RXK1 fail 2:RXK2 fail */       \r
+       u4Byte          LOK_IDAC[2][4];         /*channel / path*/\r
+       u4Byte          RXIQK_AGC[2][4];         /*channel / path*/\r
+       u4Byte          bypassIQK[2][4];        /*channel / 0xc94/0xe94*/\r
+       u4Byte          tmp_GNTWL;\r
+       BOOLEAN         is_BTG;\r
+\r
+} IQK_INFO, *PIQK_INFO;\r
+\r
+#endif\r