--- /dev/null
+/******************************************************************************\r
+ *\r
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.\r
+ *\r
+ * This program is free software; you can redistribute it and/or modify it\r
+ * under the terms of version 2 of the GNU General Public License as\r
+ * published by the Free Software Foundation.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but WITHOUT\r
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ * more details.\r
+ *\r
+ * You should have received a copy of the GNU General Public License along with\r
+ * this program; if not, write to the Free Software Foundation, Inc.,\r
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA\r
+ *\r
+ *\r
+ ******************************************************************************/\r
+#ifndef __RTL8812A_HAL_H__\r
+#define __RTL8812A_HAL_H__\r
+\r
+//#include "hal_com.h"\r
+#include "hal_data.h"\r
+\r
+//include HAL Related header after HAL Related compiling flags \r
+#include "rtl8812a_spec.h"\r
+#include "rtl8812a_rf.h"\r
+#include "rtl8812a_dm.h"\r
+#include "rtl8812a_recv.h"\r
+#include "rtl8812a_xmit.h"\r
+#include "rtl8812a_cmd.h"\r
+#include "rtl8812a_led.h"\r
+#include "Hal8812PwrSeq.h"\r
+#include "Hal8821APwrSeq.h" //for 8821A/8811A\r
+#include "Hal8812PhyReg.h"\r
+#include "Hal8812PhyCfg.h"\r
+#ifdef DBG_CONFIG_ERROR_DETECT\r
+#include "rtl8812a_sreset.h"\r
+#endif\r
+\r
+\r
+//---------------------------------------------------------------------\r
+// RTL8812AU From header\r
+//---------------------------------------------------------------------\r
+ #define RTL8812_FW_IMG "rtl8812a/FW_NIC.bin"\r
+ #define RTL8812_FW_WW_IMG "rtl8812a/FW_WoWLAN.bin"\r
+ #define RTL8812_PHY_REG "rtl8812a/PHY_REG.txt" \r
+ #define RTL8812_PHY_RADIO_A "rtl8812a/RadioA.txt"\r
+ #define RTL8812_PHY_RADIO_B "rtl8812a/RadioB.txt"\r
+ #define RTL8812_TXPWR_TRACK "rtl8812a/TxPowerTrack.txt" \r
+ #define RTL8812_AGC_TAB "rtl8812a/AGC_TAB.txt"\r
+ #define RTL8812_PHY_MACREG "rtl8812a/MAC_REG.txt"\r
+ #define RTL8812_PHY_REG_PG "rtl8812a/PHY_REG_PG.txt"\r
+ #define RTL8812_PHY_REG_MP "rtl8812a/PHY_REG_MP.txt" \r
+ #define RTL8812_TXPWR_LMT "rtl8812a/TXPWR_LMT.txt" \r
+ #define RTL8812_WIFI_ANT_ISOLATION "rtl8812a/wifi_ant_isolation.txt"\r
+\r
+//---------------------------------------------------------------------\r
+// RTL8821U From file\r
+//---------------------------------------------------------------------\r
+ #define RTL8821_FW_IMG "rtl8821a/FW_NIC.bin"\r
+ #define RTL8821_FW_WW_IMG "rtl8821a/FW_WoWLAN.bin"\r
+ #define RTL8821_PHY_REG "rtl8821a/PHY_REG.txt" \r
+ #define RTL8821_PHY_RADIO_A "rtl8821a/RadioA.txt"\r
+ #define RTL8821_PHY_RADIO_B "rtl8821a/RadioB.txt" \r
+ #define RTL8821_TXPWR_TRACK "rtl8821a/TxPowerTrack.txt" \r
+ #define RTL8821_AGC_TAB "rtl8821a/AGC_TAB.txt"\r
+ #define RTL8821_PHY_MACREG "rtl8821a/MAC_REG.txt"\r
+ #define RTL8821_PHY_REG_PG "rtl8821a/PHY_REG_PG.txt"\r
+ #define RTL8821_PHY_REG_MP "rtl8821a/PHY_REG_MP.txt"\r
+ #define RTL8821_TXPWR_LMT "rtl8821a/TXPWR_LMT.txt" \r
+\r
+//---------------------------------------------------------------------\r
+// RTL8812 Power Configuration CMDs for PCIe interface\r
+//---------------------------------------------------------------------\r
+#define Rtl8812_NIC_PWR_ON_FLOW rtl8812_power_on_flow\r
+#define Rtl8812_NIC_RF_OFF_FLOW rtl8812_radio_off_flow\r
+#define Rtl8812_NIC_DISABLE_FLOW rtl8812_card_disable_flow\r
+#define Rtl8812_NIC_ENABLE_FLOW rtl8812_card_enable_flow\r
+#define Rtl8812_NIC_SUSPEND_FLOW rtl8812_suspend_flow\r
+#define Rtl8812_NIC_RESUME_FLOW rtl8812_resume_flow\r
+#define Rtl8812_NIC_PDN_FLOW rtl8812_hwpdn_flow\r
+#define Rtl8812_NIC_LPS_ENTER_FLOW rtl8812_enter_lps_flow\r
+#define Rtl8812_NIC_LPS_LEAVE_FLOW rtl8812_leave_lps_flow \r
+\r
+//---------------------------------------------------------------------\r
+// RTL8821 Power Configuration CMDs for PCIe interface\r
+//---------------------------------------------------------------------\r
+#define Rtl8821A_NIC_PWR_ON_FLOW rtl8821A_power_on_flow\r
+#define Rtl8821A_NIC_RF_OFF_FLOW rtl8821A_radio_off_flow\r
+#define Rtl8821A_NIC_DISABLE_FLOW rtl8821A_card_disable_flow\r
+#define Rtl8821A_NIC_ENABLE_FLOW rtl8821A_card_enable_flow\r
+#define Rtl8821A_NIC_SUSPEND_FLOW rtl8821A_suspend_flow\r
+#define Rtl8821A_NIC_RESUME_FLOW rtl8821A_resume_flow\r
+#define Rtl8821A_NIC_PDN_FLOW rtl8821A_hwpdn_flow\r
+#define Rtl8821A_NIC_LPS_ENTER_FLOW rtl8821A_enter_lps_flow\r
+#define Rtl8821A_NIC_LPS_LEAVE_FLOW rtl8821A_leave_lps_flow \r
+\r
+\r
+#if 1 // download firmware related data structure\r
+#define FW_SIZE_8812 0x8000 // Compatible with RTL8723 Maximal RAM code size 24K. modified to 32k, TO compatible with 92d maximal fw size 32k\r
+#define FW_START_ADDRESS 0x1000\r
+#define FW_END_ADDRESS 0x5FFF\r
+\r
+\r
+\r
+typedef struct _RT_FIRMWARE_8812 {\r
+ FIRMWARE_SOURCE eFWSource;\r
+#ifdef CONFIG_EMBEDDED_FWIMG\r
+ u8* szFwBuffer;\r
+#else\r
+ u8 szFwBuffer[FW_SIZE_8812];\r
+#endif\r
+ u32 ulFwLength;\r
+} RT_FIRMWARE_8812, *PRT_FIRMWARE_8812;\r
+\r
+//\r
+// This structure must be cared byte-ordering\r
+//\r
+// Added by tynli. 2009.12.04.\r
+#define IS_FW_HEADER_EXIST_8812(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8812(_pFwHdr) &0xFFF0) == 0x9500)\r
+\r
+#define IS_FW_HEADER_EXIST_8821(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8812(_pFwHdr) &0xFFF0) == 0x2100)\r
+//=====================================================\r
+// Firmware Header(8-byte alinment required)\r
+//=====================================================\r
+//--- LONG WORD 0 ----\r
+#define GET_FIRMWARE_HDR_SIGNATURE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 0, 16) // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut\r
+#define GET_FIRMWARE_HDR_CATEGORY_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 16, 8) // AP/NIC and USB/PCI\r
+#define GET_FIRMWARE_HDR_FUNCTION_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 24, 8) // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions\r
+#define GET_FIRMWARE_HDR_VERSION_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 0, 16)// FW Version\r
+#define GET_FIRMWARE_HDR_SUB_VER_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 16, 8) // FW Subversion, default 0x00\r
+#define GET_FIRMWARE_HDR_RSVD1_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 24, 8) \r
+\r
+//--- LONG WORD 1 ----\r
+#define GET_FIRMWARE_HDR_MONTH_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 0, 8) // Release time Month field\r
+#define GET_FIRMWARE_HDR_DATE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 8, 8) // Release time Date field\r
+#define GET_FIRMWARE_HDR_HOUR_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 16, 8)// Release time Hour field\r
+#define GET_FIRMWARE_HDR_MINUTE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 24, 8)// Release time Minute field\r
+#define GET_FIRMWARE_HDR_ROMCODE_SIZE_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 0, 16)// The size of RAM code\r
+#define GET_FIRMWARE_HDR_RSVD2_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 16, 16)\r
+\r
+//--- LONG WORD 2 ----\r
+#define GET_FIRMWARE_HDR_SVN_IDX_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 0, 32)// The SVN entry index\r
+#define GET_FIRMWARE_HDR_RSVD3_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 0, 32)\r
+\r
+//--- LONG WORD 3 ----\r
+#define GET_FIRMWARE_HDR_RSVD4_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 0, 32)\r
+#define GET_FIRMWARE_HDR_RSVD5_8812(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+28, 0, 32)\r
+\r
+#endif // download firmware related data structure\r
+\r
+\r
+#define DRIVER_EARLY_INT_TIME_8812 0x05\r
+#define BCN_DMA_ATIME_INT_TIME_8812 0x02\r
+\r
+//for 8812\r
+// TX 128K, RX 16K, Page size 512B for TX, 128B for RX\r
+#define MAX_RX_DMA_BUFFER_SIZE_8812 0x3E80 /* RX 16K */\r
+\r
+#ifdef CONFIG_WOWLAN\r
+#define RESV_FMWF WKFMCAM_SIZE*MAX_WKFM_NUM /* 16 entries, for each is 24 bytes*/\r
+#else\r
+#define RESV_FMWF 0\r
+#endif\r
+\r
+#ifdef CONFIG_FW_C2H_DEBUG \r
+#define RX_DMA_RESERVED_SIZE_8812 0x100 // 256B, reserved for c2h debug message\r
+#else\r
+#define RX_DMA_RESERVED_SIZE_8812 0x0 // 0B\r
+#endif\r
+#define RX_DMA_BOUNDARY_8812 (MAX_RX_DMA_BUFFER_SIZE_8812 - RX_DMA_RESERVED_SIZE_8812 - 1)\r
+\r
+#define BCNQ_PAGE_NUM_8812 0x07\r
+\r
+//For WoWLan , more reserved page\r
+//ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:1,GTK EXT MEM:1, PNO: 6\r
+#ifdef CONFIG_WOWLAN\r
+#define WOWLAN_PAGE_NUM_8812 0x05\r
+#else\r
+#define WOWLAN_PAGE_NUM_8812 0x00\r
+#endif\r
+\r
+\r
+#ifdef CONFIG_BEAMFORMER_FW_NDPA\r
+#define FW_NDPA_PAGE_NUM 0x02\r
+#else\r
+#define FW_NDPA_PAGE_NUM 0x00\r
+#endif\r
+\r
+#define TX_TOTAL_PAGE_NUMBER_8812 (0xFF - BCNQ_PAGE_NUM_8812 - WOWLAN_PAGE_NUM_8812-FW_NDPA_PAGE_NUM)\r
+#define TX_PAGE_BOUNDARY_8812 (TX_TOTAL_PAGE_NUMBER_8812 + 1)\r
+\r
+#define TX_PAGE_BOUNDARY_WOWLAN_8812 (0xFF - BCNQ_PAGE_NUM_8812 - WOWLAN_PAGE_NUM_8812 + 1)\r
+\r
+#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8812 TX_TOTAL_PAGE_NUMBER_8812\r
+#define WMM_NORMAL_TX_PAGE_BOUNDARY_8812 (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8812 + 1)\r
+\r
+// For Normal Chip Setting\r
+// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8812\r
+#define NORMAL_PAGE_NUM_LPQ_8812 0x10\r
+#define NORMAL_PAGE_NUM_HPQ_8812 0x10\r
+#define NORMAL_PAGE_NUM_NPQ_8812 0x00\r
+\r
+#define WMM_NORMAL_PAGE_NUM_HPQ_8812 0x30\r
+#define WMM_NORMAL_PAGE_NUM_LPQ_8812 0x20\r
+#define WMM_NORMAL_PAGE_NUM_NPQ_8812 0x20\r
+\r
+\r
+// for 8821A\r
+// TX 64K, RX 16K, Page size 256B for TX, 128B for RX\r
+#define PAGE_SIZE_TX_8821A 256\r
+#define PAGE_SIZE_RX_8821A 128\r
+\r
+#define MAX_RX_DMA_BUFFER_SIZE_8821 0x3E80 /* RX 16K */\r
+\r
+#ifdef CONFIG_FW_C2H_DEBUG \r
+#define RX_DMA_RESERVED_SIZE_8821 0x100 // 256B, reserved for c2h debug message\r
+#else\r
+#define RX_DMA_RESERVED_SIZE_8821 0x0 // 0B\r
+#endif\r
+#define RX_DMA_BOUNDARY_8821 (MAX_RX_DMA_BUFFER_SIZE_8821 - RX_DMA_RESERVED_SIZE_8821 - 1)\r
+\r
+#define BCNQ_PAGE_NUM_8821 0x08\r
+#ifdef CONFIG_CONCURRENT_MODE\r
+#define BCNQ1_PAGE_NUM_8821 0x04\r
+#else\r
+#define BCNQ1_PAGE_NUM_8821 0x00\r
+#endif\r
+\r
+//For WoWLan , more reserved page\r
+//ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:1,GTK EXT MEM:1, PNO: 6\r
+#ifdef CONFIG_WOWLAN\r
+#define WOWLAN_PAGE_NUM_8821 0x06\r
+#else\r
+#define WOWLAN_PAGE_NUM_8821 0x00\r
+#endif\r
+\r
+#define TX_TOTAL_PAGE_NUMBER_8821 (0xFF - BCNQ_PAGE_NUM_8821 - BCNQ1_PAGE_NUM_8821 - WOWLAN_PAGE_NUM_8821)\r
+#define TX_PAGE_BOUNDARY_8821 (TX_TOTAL_PAGE_NUMBER_8821 + 1)\r
+//#define TX_PAGE_BOUNDARY_WOWLAN_8821 0xE0\r
+\r
+#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8821 TX_TOTAL_PAGE_NUMBER_8821\r
+#define WMM_NORMAL_TX_PAGE_BOUNDARY_8821 (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8821 + 1)\r
+\r
+\r
+// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER\r
+#define NORMAL_PAGE_NUM_LPQ_8821 0x08//0x10\r
+#define NORMAL_PAGE_NUM_HPQ_8821 0x08//0x10\r
+#define NORMAL_PAGE_NUM_NPQ_8821 0x00\r
+\r
+#define WMM_NORMAL_PAGE_NUM_HPQ_8821 0x30\r
+#define WMM_NORMAL_PAGE_NUM_LPQ_8821 0x20\r
+#define WMM_NORMAL_PAGE_NUM_NPQ_8821 0x20\r
+\r
+\r
+#define EFUSE_HIDDEN_812AU 0\r
+#define EFUSE_HIDDEN_812AU_VS 1\r
+#define EFUSE_HIDDEN_812AU_VL 2\r
+#define EFUSE_HIDDEN_812AU_VN 3\r
+\r
+#if 0\r
+#define EFUSE_REAL_CONTENT_LEN_JAGUAR 1024\r
+#define HWSET_MAX_SIZE_JAGUAR 1024\r
+#else\r
+#define EFUSE_REAL_CONTENT_LEN_JAGUAR 512\r
+#define HWSET_MAX_SIZE_JAGUAR 512\r
+#endif\r
+\r
+#define EFUSE_MAX_BANK_8812A 2\r
+#define EFUSE_MAP_LEN_JAGUAR 512\r
+#define EFUSE_MAX_SECTION_JAGUAR 64\r
+#define EFUSE_MAX_WORD_UNIT_JAGUAR 4\r
+#define EFUSE_IC_ID_OFFSET_JAGUAR 506 //For some inferiority IC purpose. added by Roger, 2009.09.02.\r
+#define AVAILABLE_EFUSE_ADDR_8812(addr) (addr < EFUSE_REAL_CONTENT_LEN_JAGUAR)\r
+// <Roger_Notes> To prevent out of boundary programming case, leave 1byte and program full section\r
+// 9bytes + 1byt + 5bytes and pre 1byte.\r
+// For worst case:\r
+// | 2byte|----8bytes----|1byte|--7bytes--| //92D\r
+#define EFUSE_OOB_PROTECT_BYTES_JAGUAR 18 // PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte.\r
+#define EFUSE_PROTECT_BYTES_BANK_JAGUAR 16\r
+// Added for different registry settings to adjust TxPwr index. added by Roger, 2010.03.09.\r
+typedef enum _TX_PWR_PERCENTAGE{\r
+ TX_PWR_PERCENTAGE_0 = 0x01, // 12.5%\r
+ TX_PWR_PERCENTAGE_1 = 0x02, // 25%\r
+ TX_PWR_PERCENTAGE_2 = 0x04, // 50%\r
+ TX_PWR_PERCENTAGE_3 = 0x08, //100%, default target output power. \r
+} TX_PWR_PERCENTAGE;\r
+\r
+#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT)\r
+#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS)\r
+\r
+//#define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE)\r
+\r
+//#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) )\r
+\r
+// rtl8812_hal_init.c\r
+void _8051Reset8812(PADAPTER padapter);\r
+s32 FirmwareDownload8812(PADAPTER Adapter, BOOLEAN bUsedWoWLANFw);\r
+void InitializeFirmwareVars8812(PADAPTER padapter);\r
+\r
+s32 _LLTWrite_8812A(PADAPTER Adapter, u32 address, u32 data);\r
+s32 InitLLTTable8812A(PADAPTER padapter, u8 txpktbuf_bndy);\r
+void InitRDGSetting8812A(PADAPTER padapter);\r
+\r
+void CheckAutoloadState8812A(PADAPTER padapter);\r
+\r
+// EFuse\r
+u8 GetEEPROMSize8812A(PADAPTER padapter);\r
+void InitPGData8812A(PADAPTER padapter);\r
+void Hal_EfuseParseIDCode8812A(PADAPTER padapter, u8 *hwinfo);\r
+void Hal_ReadPROMVersion8812A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);\r
+void Hal_ReadTxPowerInfo8812A(PADAPTER padapter, u8* hwinfo,BOOLEAN AutoLoadFail);\r
+void Hal_ReadBoardType8812A(PADAPTER pAdapter, u8* hwinfo,BOOLEAN AutoLoadFail);\r
+void Hal_ReadThermalMeter_8812A(PADAPTER Adapter, u8* PROMContent,BOOLEAN AutoloadFail);\r
+void Hal_ReadChannelPlan8812A(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail);\r
+void Hal_EfuseParseXtal_8812A(PADAPTER pAdapter, u8* hwinfo,BOOLEAN AutoLoadFail);\r
+void Hal_ReadAntennaDiversity8812A(PADAPTER pAdapter,u8* PROMContent,BOOLEAN AutoLoadFail);\r
+void Hal_ReadAntennaDiversity8821A(PADAPTER pAdapter, u8* PROMContent, BOOLEAN AutoLoadFail);\r
+void Hal_ReadAmplifierType_8812A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail);\r
+void Hal_ReadPAType_8821A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail);\r
+void Hal_ReadRFEType_8812A(PADAPTER Adapter,u8* PROMContent, BOOLEAN AutoloadFail);\r
+void Hal_EfuseParseBTCoexistInfo8812A(PADAPTER Adapter, u8* hwinfo, BOOLEAN AutoLoadFail);\r
+void hal_ReadUsbType_8812AU(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail);\r
+int FirmwareDownloadBT(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware);\r
+void Hal_ReadRemoteWakeup_8812A(PADAPTER padapter, u8* hwinfo, BOOLEAN AutoLoadFail);\r
+\r
+BOOLEAN HalDetectPwrDownMode8812(PADAPTER Adapter);\r
+void Hal_EfuseParseKFreeData_8821A(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail);\r
+ \r
+#ifdef CONFIG_WOWLAN\r
+void Hal_DetectWoWMode(PADAPTER pAdapter);\r
+#endif //CONFIG_WOWLAN\r
+\r
+void _InitBeaconParameters_8812A(PADAPTER padapter);\r
+void SetBeaconRelatedRegisters8812A(PADAPTER padapter);\r
+\r
+void ReadRFType8812A(PADAPTER padapter);\r
+void InitDefaultValue8821A(PADAPTER padapter);\r
+\r
+void SetHwReg8812A(PADAPTER padapter, u8 variable, u8 *pval);\r
+void GetHwReg8812A(PADAPTER padapter, u8 variable, u8 *pval);\r
+u8 SetHalDefVar8812A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval);\r
+u8 GetHalDefVar8812A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval);\r
+s32 c2h_id_filter_ccx_8812a(u8 *buf);\r
+void rtl8812_set_hal_ops(struct hal_ops *pHalFunc);\r
+void init_hal_spec_8812a(_adapter *adapter);\r
+void init_hal_spec_8821a(_adapter *adapter);\r
+\r
+// register\r
+void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits);\r
+\r
+void rtl8812_start_thread(PADAPTER padapter);\r
+void rtl8812_stop_thread(PADAPTER padapter);\r
+\r
+#ifdef CONFIG_PCI_HCI\r
+BOOLEAN InterruptRecognized8812AE(PADAPTER Adapter);\r
+VOID UpdateInterruptMask8812AE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1);\r
+#endif\r
+\r
+#ifdef CONFIG_BT_COEXIST\r
+void rtl8812a_combo_card_WifiOnlyHwInit(PADAPTER Adapter);\r
+#endif\r
+\r
+VOID\r
+Hal_PatchwithJaguar_8812(\r
+ IN PADAPTER Adapter,\r
+ IN RT_MEDIA_STATUS MediaStatus\r
+ );\r
+\r
+#endif //__RTL8188E_HAL_H__\r
+\r
projects / firefly-linux-kernel-4.4.55.git / blobdiff