--- /dev/null
+/******************************************************************************\r
+ *\r
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.\r
+ * \r
+ * This program is free software; you can redistribute it and/or modify it\r
+ * under the terms of version 2 of the GNU General Public License as\r
+ * published by the Free Software Foundation.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but WITHOUT\r
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ * more details.\r
+ *\r
+ * You should have received a copy of the GNU General Public License along with\r
+ * this program; if not, write to the Free Software Foundation, Inc.,\r
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA\r
+ *\r
+ *\r
+ ******************************************************************************/\r
+#ifndef __ODM_TYPES_H__\r
+#define __ODM_TYPES_H__\r
+\r
+\r
+/*Define Different SW team support*/\r
+#define ODM_AP 0x01 /*BIT0*/\r
+#define ODM_ADSL 0x02\r
+#define ODM_CE 0x04 /*BIT2*/\r
+#define ODM_WIN 0x08 /*BIT3*/\r
+\r
+/*Deifne HW endian support*/\r
+#define ODM_ENDIAN_BIG 0\r
+#define ODM_ENDIAN_LITTLE 1\r
+\r
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
+#define GET_PDM_ODM(__pAdapter) ((PDM_ODM_T)(&((GET_HAL_DATA(__pAdapter))->DM_OutSrc)))\r
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)\r
+#define GET_PDM_ODM(__pAdapter) ((PDM_ODM_T)(&((GET_HAL_DATA(__pAdapter))->odmpriv)))\r
+#endif\r
+\r
+#if (DM_ODM_SUPPORT_TYPE != ODM_WIN)\r
+#define RT_PCI_INTERFACE 1\r
+#define RT_USB_INTERFACE 2\r
+#define RT_SDIO_INTERFACE 3\r
+#endif\r
+\r
+typedef enum _HAL_STATUS{\r
+ HAL_STATUS_SUCCESS,\r
+ HAL_STATUS_FAILURE,\r
+ /*RT_STATUS_PENDING,\r
+ RT_STATUS_RESOURCE,\r
+ RT_STATUS_INVALID_CONTEXT,\r
+ RT_STATUS_INVALID_PARAMETER,\r
+ RT_STATUS_NOT_SUPPORT,\r
+ RT_STATUS_OS_API_FAILED,*/\r
+}HAL_STATUS,*PHAL_STATUS;\r
+\r
+#if( DM_ODM_SUPPORT_TYPE == ODM_AP)\r
+#define MP_DRIVER 0\r
+#endif\r
+#if(DM_ODM_SUPPORT_TYPE != ODM_WIN)\r
+\r
+#define VISTA_USB_RX_REVISE 0\r
+\r
+//\r
+// Declare for ODM spin lock defintion temporarily fro compile pass.\r
+//\r
+typedef enum _RT_SPINLOCK_TYPE{\r
+ RT_TX_SPINLOCK = 1,\r
+ RT_RX_SPINLOCK = 2,\r
+ RT_RM_SPINLOCK = 3,\r
+ RT_CAM_SPINLOCK = 4,\r
+ RT_SCAN_SPINLOCK = 5,\r
+ RT_LOG_SPINLOCK = 7, \r
+ RT_BW_SPINLOCK = 8,\r
+ RT_CHNLOP_SPINLOCK = 9,\r
+ RT_RF_OPERATE_SPINLOCK = 10,\r
+ RT_INITIAL_SPINLOCK = 11,\r
+ RT_RF_STATE_SPINLOCK = 12, // For RF state. Added by Bruce, 2007-10-30.\r
+#if VISTA_USB_RX_REVISE\r
+ RT_USBRX_CONTEXT_SPINLOCK = 13,\r
+ RT_USBRX_POSTPROC_SPINLOCK = 14, // protect data of Adapter->IndicateW/ IndicateR\r
+#endif\r
+ //Shall we define Ndis 6.2 SpinLock Here ?\r
+ RT_PORT_SPINLOCK=16,\r
+ RT_VNIC_SPINLOCK=17,\r
+ RT_HVL_SPINLOCK=18, \r
+ RT_H2C_SPINLOCK = 20, // For H2C cmd. Added by tynli. 2009.11.09.\r
+\r
+ RT_BTData_SPINLOCK=25,\r
+\r
+ RT_WAPI_OPTION_SPINLOCK=26,\r
+ RT_WAPI_RX_SPINLOCK=27,\r
+\r
+ // add for 92D CCK control issue \r
+ RT_CCK_PAGEA_SPINLOCK = 28,\r
+ RT_BUFFER_SPINLOCK = 29,\r
+ RT_CHANNEL_AND_BANDWIDTH_SPINLOCK = 30,\r
+ RT_GEN_TEMP_BUF_SPINLOCK = 31,\r
+ RT_AWB_SPINLOCK = 32,\r
+ RT_FW_PS_SPINLOCK = 33,\r
+ RT_HW_TIMER_SPIN_LOCK = 34,\r
+ RT_MPT_WI_SPINLOCK = 35,\r
+ RT_P2P_SPIN_LOCK = 36, // Protect P2P context\r
+ RT_DBG_SPIN_LOCK = 37,\r
+ RT_IQK_SPINLOCK = 38,\r
+ RT_PENDED_OID_SPINLOCK = 39,\r
+ RT_CHNLLIST_SPINLOCK = 40, \r
+ RT_INDIC_SPINLOCK = 41, //protect indication \r
+ RT_RFD_SPINLOCK = 42,\r
+ RT_SYNC_IO_CNT_SPINLOCK = 43,\r
+ RT_LAST_SPINLOCK,\r
+}RT_SPINLOCK_TYPE;\r
+\r
+#endif\r
+\r
+\r
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
+ #define STA_INFO_T RT_WLAN_STA\r
+ #define PSTA_INFO_T PRT_WLAN_STA\r
+ #define __func__ __FUNCTION__\r
+ #define PHYDM_TESTCHIP_SUPPORT TESTCHIP_SUPPORT\r
+ #define bMaskH3Bytes 0xffffff00\r
+ #define SUCCESS 0\r
+ #define FAIL (-1)\r
+\r
+#elif (DM_ODM_SUPPORT_TYPE == ODM_AP)\r
+\r
+ // To let ADSL/AP project compile ok; it should be removed after all conflict are solved. Added by Annie, 2011-10-07.\r
+ #define ADSL_AP_BUILD_WORKAROUND\r
+ #define AP_BUILD_WORKAROUND\r
+\r
+ #ifdef AP_BUILD_WORKAROUND\r
+ #include "../typedef.h"\r
+ #else\r
+ typedef void VOID,*PVOID;\r
+ typedef unsigned char BOOLEAN,*PBOOLEAN;\r
+ typedef unsigned char u1Byte,*pu1Byte;\r
+ typedef unsigned short u2Byte,*pu2Byte;\r
+ typedef unsigned int u4Byte,*pu4Byte;\r
+ typedef unsigned long long u8Byte,*pu8Byte;\r
+#if 1\r
+/* In ARM platform, system would use the type -- "char" as "unsigned char"\r
+ * And we only use s1Byte/ps1Byte as INT8 now, so changes the type of s1Byte.*/\r
+ typedef signed char s1Byte,*ps1Byte;\r
+#else\r
+ typedef char s1Byte,*ps1Byte;\r
+#endif\r
+ typedef short s2Byte,*ps2Byte;\r
+ typedef long s4Byte,*ps4Byte;\r
+ typedef long long s8Byte,*ps8Byte;\r
+ #endif\r
+\r
+ typedef struct rtl8192cd_priv *prtl8192cd_priv;\r
+ typedef struct stat_info STA_INFO_T,*PSTA_INFO_T;\r
+ typedef struct timer_list RT_TIMER, *PRT_TIMER;\r
+ typedef void * RT_TIMER_CALL_BACK;\r
+\r
+#ifdef CONFIG_PCI_HCI\r
+ #define DEV_BUS_TYPE RT_PCI_INTERFACE\r
+#endif\r
+\r
+ #define _TRUE 1\r
+ #define _FALSE 0\r
+\r
+ #if (defined(TESTCHIP_SUPPORT))\r
+ #define PHYDM_TESTCHIP_SUPPORT 1\r
+ #else\r
+ #define PHYDM_TESTCHIP_SUPPORT 0\r
+ #endif\r
+ \r
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)\r
+ #include <drv_types.h>\r
+#if 0\r
+ typedef u8 u1Byte, *pu1Byte;\r
+ typedef u16 u2Byte,*pu2Byte;\r
+ typedef u32 u4Byte,*pu4Byte;\r
+ typedef u64 u8Byte,*pu8Byte;\r
+ typedef s8 s1Byte,*ps1Byte;\r
+ typedef s16 s2Byte,*ps2Byte;\r
+ typedef s32 s4Byte,*ps4Byte;\r
+ typedef s64 s8Byte,*ps8Byte;\r
+#else\r
+ #define u1Byte u8\r
+ #define pu1Byte u8* \r
+\r
+ #define u2Byte u16\r
+ #define pu2Byte u16* \r
+\r
+ #define u4Byte u32\r
+ #define pu4Byte u32* \r
+\r
+ #define u8Byte u64\r
+ #define pu8Byte u64*\r
+\r
+ #define s1Byte s8\r
+ #define ps1Byte s8* \r
+\r
+ #define s2Byte s16\r
+ #define ps2Byte s16* \r
+\r
+ #define s4Byte s32\r
+ #define ps4Byte s32* \r
+\r
+ #define s8Byte s64\r
+ #define ps8Byte s64* \r
+ \r
+#endif\r
+ #ifdef CONFIG_USB_HCI\r
+ #define DEV_BUS_TYPE RT_USB_INTERFACE\r
+ #elif defined(CONFIG_PCI_HCI)\r
+ #define DEV_BUS_TYPE RT_PCI_INTERFACE\r
+ #elif defined(CONFIG_SDIO_HCI)\r
+ #define DEV_BUS_TYPE RT_SDIO_INTERFACE\r
+ #elif defined(CONFIG_GSPI_HCI)\r
+ #define DEV_BUS_TYPE RT_SDIO_INTERFACE\r
+ #endif\r
+ \r
+\r
+ #if defined(CONFIG_LITTLE_ENDIAN) \r
+ #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE\r
+ #elif defined (CONFIG_BIG_ENDIAN)\r
+ #define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG\r
+ #endif\r
+ \r
+ typedef struct timer_list RT_TIMER, *PRT_TIMER;\r
+ typedef void * RT_TIMER_CALL_BACK;\r
+ #define STA_INFO_T struct sta_info\r
+ #define PSTA_INFO_T struct sta_info *\r
+ \r
+\r
+\r
+ #define TRUE _TRUE \r
+ #define FALSE _FALSE\r
+\r
+\r
+ #define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 1, __Value)\r
+ #define SET_TX_DESC_ANTSEL_B_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 25, 1, __Value)\r
+ #define SET_TX_DESC_ANTSEL_C_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 29, 1, __Value)\r
+\r
+ //define useless flag to avoid compile warning\r
+ #define USE_WORKITEM 0\r
+ #define FOR_BRAZIL_PRETEST 0\r
+ /*#define BT_30_SUPPORT 0*/\r
+ #define FPGA_TWO_MAC_VERIFICATION 0\r
+ #define RTL8881A_SUPPORT 0\r
+\r
+ #if (defined(TESTCHIP_SUPPORT))\r
+ #define PHYDM_TESTCHIP_SUPPORT 1\r
+ #else\r
+ #define PHYDM_TESTCHIP_SUPPORT 0\r
+ #endif\r
+#endif\r
+\r
+#define READ_NEXT_PAIR(v1, v2, i) do { if (i+2 >= ArrayLen) break; i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0)\r
+#define COND_ELSE 2\r
+#define COND_ENDIF 3\r
+\r
+#endif // __ODM_TYPES_H__\r
+\r
projects / firefly-linux-kernel-4.4.55.git / blobdiff