--- /dev/null
+/******************************************************************************\r
+ *\r
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.\r
+ * \r
+ * This program is free software; you can redistribute it and/or modify it\r
+ * under the terms of version 2 of the GNU General Public License as\r
+ * published by the Free Software Foundation.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but WITHOUT\r
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ * more details.\r
+ *\r
+ * You should have received a copy of the GNU General Public License along with\r
+ * this program; if not, write to the Free Software Foundation, Inc.,\r
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA\r
+ *\r
+ *\r
+ ******************************************************************************/\r
+\r
+\r
+#ifndef __HALHWOUTSRC_H__\r
+#define __HALHWOUTSRC_H__\r
+\r
+\r
+/*--------------------------Define -------------------------------------------*/ \r
+\r
+#define AGC_DIFF_CONFIG_MP(ic, band) (ODM_ReadAndConfig_MP_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_MP_##ic##_AGC_TAB_DIFF_##band, \\r
+ sizeof(Array_MP_##ic##_AGC_TAB_DIFF_##band)/sizeof(u4Byte)))\r
+#define AGC_DIFF_CONFIG_TC(ic, band) (ODM_ReadAndConfig_TC_##ic##_AGC_TAB_DIFF(pDM_Odm, Array_TC_##ic##_AGC_TAB_DIFF_##band, \\r
+ sizeof(Array_TC_##ic##_AGC_TAB_DIFF_##band)/sizeof(u4Byte)))\r
+\r
+#define AGC_DIFF_CONFIG(ic, band) do {\\r
+ if (pDM_Odm->bIsMPChip)\\r
+ AGC_DIFF_CONFIG_MP(ic,band);\\r
+ else\\r
+ AGC_DIFF_CONFIG_TC(ic,band);\\r
+ } while(0)\r
+\r
+\r
+//============================================================\r
+// structure and define\r
+//============================================================\r
+\r
+__PACK typedef struct _Phy_Rx_AGC_Info\r
+{\r
+ #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) \r
+ u1Byte gain:7,trsw:1; \r
+ #else \r
+ u1Byte trsw:1,gain:7;\r
+ #endif\r
+} __WLAN_ATTRIB_PACK__ PHY_RX_AGC_INFO_T, *pPHY_RX_AGC_INFO_T;\r
+\r
+__PACK typedef struct _Phy_Status_Rpt_8192cd {\r
+ PHY_RX_AGC_INFO_T path_agc[2];\r
+ u1Byte ch_corr[2];\r
+ u1Byte cck_sig_qual_ofdm_pwdb_all;\r
+ u1Byte cck_agc_rpt_ofdm_cfosho_a;\r
+ u1Byte cck_rpt_b_ofdm_cfosho_b;\r
+ u1Byte rsvd_1;/*ch_corr_msb;*/\r
+ u1Byte noise_power_db_msb;\r
+ s1Byte path_cfotail[2];\r
+ u1Byte pcts_mask[2];\r
+ s1Byte stream_rxevm[2];\r
+ u1Byte path_rxsnr[2];\r
+ u1Byte noise_power_db_lsb;\r
+ u1Byte rsvd_2[3];\r
+ u1Byte stream_csi[2];\r
+ u1Byte stream_target_csi[2];\r
+ s1Byte sig_evm;\r
+ u1Byte rsvd_3;\r
+\r
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)\r
+ u1Byte antsel_rx_keep_2: 1; /*ex_intf_flg:1;*/\r
+ u1Byte sgi_en: 1;\r
+ u1Byte rxsc: 2;\r
+ u1Byte idle_long: 1;\r
+ u1Byte r_ant_train_en: 1;\r
+ u1Byte ant_sel_b: 1;\r
+ u1Byte ant_sel: 1;\r
+#else /*_BIG_ENDIAN_ */\r
+ u1Byte ant_sel: 1;\r
+ u1Byte ant_sel_b: 1;\r
+ u1Byte r_ant_train_en: 1;\r
+ u1Byte idle_long: 1;\r
+ u1Byte rxsc: 2;\r
+ u1Byte sgi_en: 1;\r
+ u1Byte antsel_rx_keep_2: 1;/*ex_intf_flg:1;*/\r
+#endif\r
+} __WLAN_ATTRIB_PACK__ PHY_STATUS_RPT_8192CD_T, *PPHY_STATUS_RPT_8192CD_T;\r
+\r
+\r
+typedef struct _Phy_Status_Rpt_8812 {\r
+/* DWORD 0*/\r
+ u1Byte gain_trsw[2]; /*path-A and path-B {TRSW, gain[6:0] }*/\r
+ u1Byte chl_num_LSB; /*channel number[7:0]*/\r
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)\r
+ u1Byte chl_num_MSB: 2; /*channel number[9:8]*/\r
+ u1Byte sub_chnl: 4; /*sub-channel location[3:0]*/\r
+ u1Byte r_RFMOD: 2; /*RF mode[1:0]*/\r
+#else /*_BIG_ENDIAN_ */\r
+ u1Byte r_RFMOD: 2;\r
+ u1Byte sub_chnl: 4;\r
+ u1Byte chl_num_MSB: 2;\r
+#endif\r
+\r
+/* DWORD 1*/\r
+ u1Byte pwdb_all; /*CCK signal quality / OFDM pwdb all*/\r
+ s1Byte cfosho[2]; /*DW1 byte 1 DW1 byte2 CCK AGC report and CCK_BB_Power / OFDM Path-A and Path-B short CFO*/\r
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)\r
+ /*this should be checked again because the definition of 8812 and 8814 is different*/\r
+/* u1Byte r_cck_rx_enable_pathc:2; cck rx enable pathc[1:0]*/\r
+/* u1Byte cck_rx_path:4; cck rx path[3:0]*/\r
+ u1Byte resvd_0: 6;\r
+ u1Byte bt_RF_ch_MSB: 2; /*8812A:2'b0 8814A: bt rf channel keep[7:6]*/\r
+#else /*_BIG_ENDIAN_*/\r
+ u1Byte bt_RF_ch_MSB: 2;\r
+ u1Byte resvd_0: 6;\r
+#endif\r
+\r
+/* DWORD 2*/\r
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)\r
+ u1Byte ant_div_sw_a: 1; /*8812A: ant_div_sw_a 8814A: 1'b0*/\r
+ u1Byte ant_div_sw_b: 1; /*8812A: ant_div_sw_b 8814A: 1'b0*/\r
+ u1Byte bt_RF_ch_LSB: 6; /*8812A: 6'b0 8814A: bt rf channel keep[5:0]*/\r
+#else /*_BIG_ENDIAN_ */\r
+ u1Byte bt_RF_ch_LSB: 6;\r
+ u1Byte ant_div_sw_b: 1;\r
+ u1Byte ant_div_sw_a: 1;\r
+#endif\r
+ s1Byte cfotail[2]; /*DW2 byte 1 DW2 byte 2 path-A and path-B CFO tail*/\r
+ u1Byte PCTS_MSK_RPT_0; /*PCTS mask report[7:0]*/\r
+ u1Byte PCTS_MSK_RPT_1; /*PCTS mask report[15:8]*/\r
+\r
+/* DWORD 3*/\r
+ s1Byte rxevm[2]; /*DW3 byte 1 DW3 byte 2 stream 1 and stream 2 RX EVM*/\r
+ s1Byte rxsnr[2]; /*DW3 byte 3 DW4 byte 0 path-A and path-B RX SNR*/\r
+\r
+/* DWORD 4*/\r
+ u1Byte PCTS_MSK_RPT_2; /*PCTS mask report[23:16]*/\r
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)\r
+ u1Byte PCTS_MSK_RPT_3: 6; /*PCTS mask report[29:24]*/\r
+ u1Byte pcts_rpt_valid: 1; /*pcts_rpt_valid*/\r
+ u1Byte resvd_1: 1; /*1'b0*/\r
+#else /*_BIG_ENDIAN_*/\r
+ u1Byte resvd_1: 1;\r
+ u1Byte pcts_rpt_valid: 1;\r
+ u1Byte PCTS_MSK_RPT_3: 6;\r
+#endif\r
+ s1Byte rxevm_cd[2]; /*DW 4 byte 3 DW5 byte 0 8812A: 16'b0 8814A: stream 3 and stream 4 RX EVM*/\r
+\r
+/* DWORD 5*/\r
+ u1Byte csi_current[2]; /*DW5 byte 1 DW5 byte 2 8812A: stream 1 and 2 CSI 8814A: path-C and path-D RX SNR*/\r
+ u1Byte gain_trsw_cd[2]; /*DW5 byte 3 DW6 byte 0 path-C and path-D {TRSW, gain[6:0] }*/\r
+\r
+/* DWORD 6*/\r
+ s1Byte sigevm; /*signal field EVM*/\r
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)\r
+ u1Byte antidx_antc: 3; /*8812A: 3'b0 8814A: antidx_antc[2:0]*/\r
+ u1Byte antidx_antd: 3; /*8812A: 3'b0 8814A: antidx_antd[2:0]*/\r
+ u1Byte dpdt_ctrl_keep: 1; /*8812A: 1'b0 8814A: dpdt_ctrl_keep*/\r
+ u1Byte GNT_BT_keep: 1; /*8812A: 1'b0 8814A: GNT_BT_keep*/\r
+#else /*_BIG_ENDIAN_*/\r
+ u1Byte GNT_BT_keep: 1;\r
+ u1Byte dpdt_ctrl_keep: 1;\r
+ u1Byte antidx_antd: 3;\r
+ u1Byte antidx_antc: 3;\r
+#endif\r
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)\r
+ u1Byte antidx_anta: 3; /*antidx_anta[2:0]*/\r
+ u1Byte antidx_antb: 3; /*antidx_antb[2:0]*/\r
+ u1Byte hw_antsw_occur: 2; /*1'b0*/\r
+#else /*_BIG_ENDIAN_*/\r
+ u1Byte hw_antsw_occur: 2;\r
+ u1Byte antidx_antb: 3;\r
+ u1Byte antidx_anta: 3;\r
+#endif\r
+} PHY_STATUS_RPT_8812_T, *PPHY_STATUS_RPT_8812_T;\r
+\r
+VOID\r
+odm_Init_RSSIForDM(\r
+ IN OUT PDM_ODM_T pDM_Odm\r
+ );\r
+\r
+VOID\r
+ODM_PhyStatusQuery(\r
+ IN OUT PDM_ODM_T pDM_Odm,\r
+ OUT PODM_PHY_INFO_T pPhyInfo,\r
+ IN pu1Byte pPhyStatus, \r
+ IN PODM_PACKET_INFO_T pPktinfo\r
+ );\r
+\r
+VOID\r
+ODM_MacStatusQuery(\r
+ IN OUT PDM_ODM_T pDM_Odm,\r
+ IN pu1Byte pMacStatus,\r
+ IN u1Byte MacID, \r
+ IN BOOLEAN bPacketMatchBSSID,\r
+ IN BOOLEAN bPacketToSelf,\r
+ IN BOOLEAN bPacketBeacon\r
+ );\r
+\r
+HAL_STATUS\r
+ODM_ConfigRFWithTxPwrTrackHeaderFile(\r
+ IN PDM_ODM_T pDM_Odm\r
+ );\r
+ \r
+HAL_STATUS\r
+ODM_ConfigRFWithHeaderFile(\r
+ IN PDM_ODM_T pDM_Odm,\r
+ IN ODM_RF_Config_Type ConfigType,\r
+ IN ODM_RF_RADIO_PATH_E eRFPath\r
+ );\r
+\r
+HAL_STATUS\r
+ODM_ConfigBBWithHeaderFile(\r
+ IN PDM_ODM_T pDM_Odm,\r
+ IN ODM_BB_Config_Type ConfigType\r
+ );\r
+\r
+HAL_STATUS\r
+ODM_ConfigMACWithHeaderFile(\r
+ IN PDM_ODM_T pDM_Odm\r
+ );\r
+\r
+HAL_STATUS\r
+ODM_ConfigFWWithHeaderFile(\r
+ IN PDM_ODM_T pDM_Odm,\r
+ IN ODM_FW_Config_Type ConfigType,\r
+ OUT u1Byte *pFirmware,\r
+ OUT u4Byte *pSize\r
+ );\r
+\r
+u4Byte \r
+ODM_GetHWImgVersion(\r
+ IN PDM_ODM_T pDM_Odm\r
+ );\r
+\r
+s4Byte\r
+odm_SignalScaleMapping( \r
+ IN OUT PDM_ODM_T pDM_Odm,\r
+ IN s4Byte CurrSig \r
+ );\r
+\r
+#if (RTL8822B_SUPPORT == 1)\r
+/*For 8822B only!! need to move to FW finally */\r
+/*==============================================*/\r
+VOID\r
+phydm_RxPhyStatusJaguarSeries2(\r
+ IN PDM_ODM_T pPhydm,\r
+ IN pu1Byte pPhyStatus,\r
+ IN PODM_PACKET_INFO_T pPktinfo,\r
+ OUT PODM_PHY_INFO_T pPhyInfo\r
+);\r
+\r
+typedef struct _Phy_Status_Rpt_Jaguar2_Type0 {\r
+ /* DW0 */\r
+ u1Byte page_num;\r
+ u1Byte pwdb;\r
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)\r
+ u1Byte gain: 6;\r
+ u1Byte rsvd_0: 1;\r
+ u1Byte trsw: 1;\r
+#else\r
+ u1Byte trsw: 1;\r
+ u1Byte rsvd_0: 1;\r
+ u1Byte gain: 6;\r
+#endif\r
+ u1Byte rsvd_1;\r
+\r
+ /* DW1 */\r
+ u1Byte rsvd_2;\r
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)\r
+ u1Byte rxsc: 4;\r
+ u1Byte agc_table: 4;\r
+#else\r
+ u1Byte agc_table: 4;\r
+ u1Byte rxsc: 4;\r
+#endif\r
+ u1Byte channel;\r
+ u1Byte band;\r
+\r
+ /* DW2 */\r
+ u2Byte length;\r
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)\r
+ u1Byte antidx_a: 3;\r
+ u1Byte antidx_b: 3;\r
+ u1Byte rsvd_3: 2;\r
+ u1Byte antidx_c: 3;\r
+ u1Byte antidx_d: 3;\r
+ u1Byte rsvd_4:2;\r
+#else\r
+ u1Byte rsvd_3: 2;\r
+ u1Byte antidx_b: 3;\r
+ u1Byte antidx_a: 3;\r
+ u1Byte rsvd_4:2;\r
+ u1Byte antidx_d: 3;\r
+ u1Byte antidx_c: 3;\r
+#endif\r
+\r
+ /* DW3 */\r
+ u1Byte signal_quality;\r
+ u1Byte agc_rpt;\r
+ u1Byte bb_power;\r
+ u1Byte rsvd_5;\r
+\r
+ /* DW4 */\r
+ u4Byte rsvd_6;\r
+\r
+ /* DW5 */\r
+ u4Byte rsvd_7;\r
+\r
+ /* DW6 */\r
+ u4Byte rsvd_8;\r
+} PHY_STATUS_RPT_JAGUAR2_TYPE0, *PPHY_STATUS_RPT_JAGUAR2_TYPE0;\r
+\r
+typedef struct _Phy_Status_Rpt_Jaguar2_Type1 {\r
+ /* DW0 and DW1 */\r
+ u1Byte page_num;\r
+ u1Byte pwdb[4];\r
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)\r
+ u1Byte l_rxsc: 4;\r
+ u1Byte ht_rxsc: 4;\r
+#else\r
+ u1Byte ht_rxsc: 4;\r
+ u1Byte l_rxsc: 4;\r
+#endif\r
+ u1Byte channel;\r
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)\r
+ u1Byte band: 2;\r
+ u1Byte rsvd_0: 1;\r
+ u1Byte hw_antsw_occu: 1;\r
+ u1Byte gnt_bt: 1;\r
+ u1Byte ldpc: 1;\r
+ u1Byte stbc: 1;\r
+ u1Byte beamformed: 1;\r
+#else\r
+ u1Byte beamformed: 1;\r
+ u1Byte stbc: 1;\r
+ u1Byte ldpc: 1;\r
+ u1Byte gnt_bt: 1;\r
+ u1Byte hw_antsw_occu: 1;\r
+ u1Byte rsvd_0: 1;\r
+ u1Byte band: 2;\r
+#endif\r
+\r
+ /* DW2 */\r
+ u2Byte lsig_length;\r
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)\r
+ u1Byte antidx_a: 3;\r
+ u1Byte antidx_b: 3;\r
+ u1Byte rsvd_1: 2;\r
+ u1Byte antidx_c: 3;\r
+ u1Byte antidx_d: 3;\r
+ u1Byte rsvd_2: 2;\r
+#else\r
+ u1Byte rsvd_1: 2;\r
+ u1Byte antidx_b: 3;\r
+ u1Byte antidx_a: 3;\r
+ u1Byte rsvd_2: 2;\r
+ u1Byte antidx_d: 3;\r
+ u1Byte antidx_c: 3;\r
+#endif\r
+\r
+ /* DW3 */\r
+ u1Byte paid;\r
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)\r
+ u1Byte paid_msb: 1;\r
+ u1Byte gid: 6;\r
+ u1Byte rsvd_3: 1;\r
+#else\r
+ u1Byte rsvd_3: 1;\r
+ u1Byte gid: 6;\r
+ u1Byte paid_msb: 1;\r
+#endif\r
+ u1Byte intf_pos;\r
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)\r
+ u1Byte intf_pos_msb: 1;\r
+ u1Byte rsvd_4: 2;\r
+ u1Byte nb_intf_flag: 1;\r
+ u1Byte rf_mode: 2;\r
+ u1Byte rsvd_5: 2;\r
+#else\r
+ u1Byte rsvd_5: 2;\r
+ u1Byte rf_mode: 2;\r
+ u1Byte nb_intf_flag: 1;\r
+ u1Byte rsvd_4: 2;\r
+ u1Byte intf_pos_msb: 1;\r
+#endif\r
+\r
+ /* DW4 */\r
+ s1Byte rxevm[4]; /* s(8,1) */\r
+\r
+ /* DW5 */\r
+ s1Byte cfo_tail[4]; /* s(8,7) */\r
+\r
+ /* DW6 */\r
+ s1Byte rxsnr[4]; /* s(8,1) */\r
+} PHY_STATUS_RPT_JAGUAR2_TYPE1, *PPHY_STATUS_RPT_JAGUAR2_TYPE1;\r
+\r
+typedef struct _Phy_Status_Rpt_Jaguar2_Type2 {\r
+ /* DW0 ane DW1 */\r
+ u1Byte page_num;\r
+ u1Byte pwdb[4];\r
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) \r
+ u1Byte l_rxsc: 4;\r
+ u1Byte ht_rxsc: 4;\r
+#else\r
+ u1Byte ht_rxsc: 4;\r
+ u1Byte l_rxsc: 4;\r
+#endif\r
+ u1Byte channel;\r
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)\r
+ u1Byte band: 2;\r
+ u1Byte rsvd_0: 1;\r
+ u1Byte hw_antsw_occu: 1;\r
+ u1Byte gnt_bt: 1;\r
+ u1Byte ldpc: 1;\r
+ u1Byte stbc: 1;\r
+ u1Byte beamformed: 1;\r
+#else\r
+ u1Byte beamformed: 1;\r
+ u1Byte stbc: 1;\r
+ u1Byte ldpc: 1;\r
+ u1Byte gnt_bt: 1;\r
+ u1Byte hw_antsw_occu: 1;\r
+ u1Byte rsvd_0: 1;\r
+ u1Byte band: 2;\r
+#endif\r
+\r
+ /* DW2 */\r
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)\r
+ u1Byte shift_l_map: 6;\r
+ u1Byte rsvd_1: 2;\r
+#else\r
+ u1Byte rsvd_1: 2;\r
+ u1Byte shift_l_map: 6;\r
+#endif\r
+ u1Byte cnt_pw2cca;\r
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)\r
+ u1Byte agc_table_a: 4;\r
+ u1Byte agc_table_b: 4;\r
+ u1Byte agc_table_c: 4;\r
+ u1Byte agc_table_d: 4;\r
+#else\r
+ u1Byte agc_table_b: 4;\r
+ u1Byte agc_table_a: 4;\r
+ u1Byte agc_table_d: 4;\r
+ u1Byte agc_table_c: 4;\r
+#endif\r
+\r
+ /* DW3 ~ DW6*/\r
+ u1Byte cnt_cca2agc_rdy;\r
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)\r
+ u1Byte gain_a: 6;\r
+ u1Byte rsvd_2: 1;\r
+ u1Byte trsw_a: 1;\r
+ u1Byte gain_b: 6;\r
+ u1Byte rsvd_3: 1;\r
+ u1Byte trsw_b: 1;\r
+ u1Byte gain_c: 6;\r
+ u1Byte rsvd_4: 1;\r
+ u1Byte trsw_c: 1;\r
+ u1Byte gain_d: 6;\r
+ u1Byte rsvd_5: 1;\r
+ u1Byte trsw_d: 1;\r
+ u1Byte aagc_step_a: 2;\r
+ u1Byte aagc_step_b: 2;\r
+ u1Byte aagc_step_c: 2;\r
+ u1Byte aagc_step_d: 2;\r
+#else\r
+ u1Byte trsw_a: 1;\r
+ u1Byte rsvd_2: 1;\r
+ u1Byte gain_a: 6;\r
+ u1Byte trsw_b: 1;\r
+ u1Byte rsvd_3: 1;\r
+ u1Byte gain_b: 6;\r
+ u1Byte trsw_c: 1;\r
+ u1Byte rsvd_4: 1;\r
+ u1Byte gain_c: 6;\r
+ u1Byte trsw_d: 1;\r
+ u1Byte rsvd_5: 1;\r
+ u1Byte gain_d: 6;\r
+ u1Byte aagc_step_d: 2;\r
+ u1Byte aagc_step_c: 2;\r
+ u1Byte aagc_step_b: 2;\r
+ u1Byte aagc_step_a: 2;\r
+#endif\r
+ u1Byte ht_aagc_gain[4];\r
+ u1Byte dagc_gain[4];\r
+#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)\r
+ u1Byte counter: 6;\r
+ u1Byte rsvd_6: 2;\r
+ u1Byte syn_count: 5;\r
+ u1Byte rsvd_7:3;\r
+#else\r
+ u1Byte rsvd_6: 2;\r
+ u1Byte counter: 6;\r
+ u1Byte rsvd_7:3;\r
+ u1Byte syn_count: 5;\r
+#endif\r
+} PHY_STATUS_RPT_JAGUAR2_TYPE2, *PPHY_STATUS_RPT_JAGUAR2_TYPE2;\r
+/*==============================================*/\r
+#endif\r
+#endif\r
+\r
projects / firefly-linux-kernel-4.4.55.git / blobdiff