--- /dev/null
+/******************************************************************************\r
+ *\r
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.\r
+ * \r
+ * This program is free software; you can redistribute it and/or modify it\r
+ * under the terms of version 2 of the GNU General Public License as\r
+ * published by the Free Software Foundation.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but WITHOUT\r
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or\r
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ * more details.\r
+ *\r
+ * You should have received a copy of the GNU General Public License along with\r
+ * this program; if not, write to the Free Software Foundation, Inc.,\r
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA\r
+ *\r
+ *\r
+ ******************************************************************************/\r
+\r
+#ifndef __PHYDMANTDIV_H__\r
+#define __PHYDMANTDIV_H__\r
+\r
+/*#define ANTDIV_VERSION "2.0" //2014.11.04*/\r
+/*#define ANTDIV_VERSION "2.1" //2015.01.13 Dino*/\r
+/*#define ANTDIV_VERSION "2.2" 2015.01.16 Dino*/\r
+/*#define ANTDIV_VERSION "3.1" 2015.07.29 YuChen, remove 92c 92d 8723a*/\r
+/*#define ANTDIV_VERSION "3.2" 2015.08.11 Stanley, disable antenna diversity when BT is enable for 8723B*/\r
+/*#define ANTDIV_VERSION "3.3" 2015.08.12 Stanley. 8723B does not need to check the antenna is control by BT, \r
+ because antenna diversity only works when BT is disable or radio off*/\r
+#define ANTDIV_VERSION "3.4" /*2015.08.28 Dino 1.Add 8821A Smart Antenna 2. Add 8188F SW S0S1 Antenna Diversity*/\r
+\r
+//1 ============================================================\r
+//1 Definition \r
+//1 ============================================================\r
+\r
+#define MAIN_ANT 1\r
+#define AUX_ANT 2\r
+\r
+#define ANT1_2G 0 // = ANT2_5G\r
+#define ANT2_2G 1 // = ANT1_5G\r
+/*smart antenna*/\r
+#define SUPPORT_RF_PATH_NUM 4\r
+#define SUPPORT_BEAM_PATTERN_NUM 4\r
+\r
+\r
+//Antenna Diversty Control Type\r
+#define ODM_AUTO_ANT 0\r
+#define ODM_FIX_MAIN_ANT 1\r
+#define ODM_FIX_AUX_ANT 2\r
+\r
+#define ODM_N_ANTDIV_SUPPORT (ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8188F)\r
+#define ODM_AC_ANTDIV_SUPPORT (ODM_RTL8821|ODM_RTL8881A|ODM_RTL8812)\r
+#define ODM_ANTDIV_SUPPORT (ODM_N_ANTDIV_SUPPORT|ODM_AC_ANTDIV_SUPPORT)\r
+#define ODM_SMART_ANT_SUPPORT (ODM_RTL8188E|ODM_RTL8192E)\r
+#define ODM_HL_SMART_ANT_TYPE1_SUPPORT (ODM_RTL8821)\r
+\r
+#define ODM_ANTDIV_2G_SUPPORT_IC (ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8881A|ODM_RTL8188F)\r
+#define ODM_ANTDIV_5G_SUPPORT_IC (ODM_RTL8821|ODM_RTL8881A|ODM_RTL8812)\r
+\r
+#define ODM_EVM_ENHANCE_ANTDIV_SUPPORT_IC (ODM_RTL8192E)\r
+\r
+#define ODM_ANTDIV_2G BIT0\r
+#define ODM_ANTDIV_5G BIT1\r
+\r
+#define ANTDIV_ON 1\r
+#define ANTDIV_OFF 0\r
+\r
+#define FAT_ON 1\r
+#define FAT_OFF 0\r
+\r
+#define TX_BY_DESC 1\r
+#define TX_BY_REG 0\r
+\r
+#define RSSI_METHOD 0\r
+#define EVM_METHOD 1\r
+#define CRC32_METHOD 2\r
+\r
+#define INIT_ANTDIV_TIMMER 0\r
+#define CANCEL_ANTDIV_TIMMER 1\r
+#define RELEASE_ANTDIV_TIMMER 2\r
+\r
+#define CRC32_FAIL 1\r
+#define CRC32_OK 0\r
+\r
+#define Evm_RSSI_TH_High 25\r
+#define Evm_RSSI_TH_Low 20\r
+\r
+#define NORMAL_STATE_MIAN 1\r
+#define NORMAL_STATE_AUX 2\r
+#define TRAINING_STATE 3\r
+\r
+#define FORCE_RSSI_DIFF 10\r
+\r
+#define CSI_ON 1\r
+#define CSI_OFF 0\r
+\r
+#define DIVON_CSIOFF 1\r
+#define DIVOFF_CSION 2\r
+\r
+#define BDC_DIV_TRAIN_STATE 0\r
+#define BDC_BFer_TRAIN_STATE 1\r
+#define BDC_DECISION_STATE 2\r
+#define BDC_BF_HOLD_STATE 3\r
+#define BDC_DIV_HOLD_STATE 4\r
+\r
+#define BDC_MODE_1 1\r
+#define BDC_MODE_2 2\r
+#define BDC_MODE_3 3\r
+#define BDC_MODE_4 4\r
+#define BDC_MODE_NULL 0xff\r
+\r
+/*SW S0S1 antenna diversity*/\r
+#define SWAW_STEP_INIT 0xff\r
+#define SWAW_STEP_PEEK 0\r
+#define SWAW_STEP_DETERMINE 1\r
+\r
+#define RSSI_CHECK_RESET_PERIOD 10\r
+#define RSSI_CHECK_THRESHOLD 50\r
+\r
+/*Hong Lin Smart antenna*/\r
+#define HL_SMTANT_2WIRE_DATA_LEN 24\r
+\r
+//1 ============================================================\r
+//1 structure\r
+//1 ============================================================\r
+\r
+\r
+typedef struct _SW_Antenna_Switch_\r
+{\r
+ u1Byte Double_chk_flag; /*If current antenna RSSI > "RSSI_CHECK_THRESHOLD", than check this antenna again*/\r
+ u1Byte try_flag;\r
+ s4Byte PreRSSI;\r
+ u1Byte CurAntenna;\r
+ u1Byte PreAntenna;\r
+ u1Byte RSSI_Trying;\r
+ u1Byte reset_idx;\r
+ u1Byte Train_time;\r
+ u1Byte Train_time_flag; /*base on RSSI difference between two antennas*/\r
+ RT_TIMER phydm_SwAntennaSwitchTimer;\r
+ u4Byte PktCnt_SWAntDivByCtrlFrame;\r
+ BOOLEAN bSWAntDivByCtrlFrame;\r
+ \r
+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) \r
+ #if USE_WORKITEM\r
+ RT_WORK_ITEM phydm_SwAntennaSwitchWorkitem; \r
+ #endif\r
+ #endif \r
+\r
+ /* AntDect (Before link Antenna Switch check) need to be moved*/\r
+ u2Byte Single_Ant_Counter;\r
+ u2Byte Dual_Ant_Counter;\r
+ u2Byte Aux_FailDetec_Counter;\r
+ u2Byte Retry_Counter; \r
+ u1Byte SWAS_NoLink_State;\r
+ u4Byte SWAS_NoLink_BK_Reg948;\r
+ BOOLEAN ANTA_ON; /*To indicate Ant A is or not*/\r
+ BOOLEAN ANTB_ON; /*To indicate Ant B is on or not*/\r
+ BOOLEAN Pre_Aux_FailDetec;\r
+ BOOLEAN RSSI_AntDect_bResult; \r
+ u1Byte Ant5G;\r
+ u1Byte Ant2G;\r
+\r
+ \r
+}SWAT_T, *pSWAT_T;\r
+\r
+\r
+#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))\r
+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))\r
+typedef struct _BF_DIV_COEX_\r
+{\r
+ BOOLEAN w_BFer_Client[ODM_ASSOCIATE_ENTRY_NUM];\r
+ BOOLEAN w_BFee_Client[ODM_ASSOCIATE_ENTRY_NUM];\r
+ u4Byte MA_rx_TP[ODM_ASSOCIATE_ENTRY_NUM];\r
+ u4Byte MA_rx_TP_DIV[ODM_ASSOCIATE_ENTRY_NUM];\r
+\r
+ u1Byte BDCcoexType_wBfer;\r
+ u1Byte num_Txbfee_Client;\r
+ u1Byte num_Txbfer_Client;\r
+ u1Byte BDC_Try_counter;\r
+ u1Byte BDC_Hold_counter;\r
+ u1Byte BDC_Mode;\r
+ u1Byte BDC_active_Mode;\r
+ u1Byte BDC_state;\r
+ u1Byte BDC_RxIdleUpdate_counter;\r
+ u1Byte num_Client;\r
+ u1Byte pre_num_Client;\r
+ u1Byte num_BfTar;\r
+ u1Byte num_DivTar;\r
+ \r
+ BOOLEAN bAll_DivSta_Idle;\r
+ BOOLEAN bAll_BFSta_Idle;\r
+ BOOLEAN BDC_Try_flag;\r
+ BOOLEAN BF_pass;\r
+ BOOLEAN DIV_pass; \r
+}BDC_T,*pBDC_T;\r
+#endif\r
+#endif\r
+\r
+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1\r
+typedef struct _SMART_ANTENNA_TRAINNING_ {\r
+ u4Byte latch_time;\r
+ BOOLEAN pkt_skip_statistic_en;\r
+ u4Byte fix_beam_pattern_en;\r
+ u4Byte fix_training_num_en;\r
+ u4Byte fix_beam_pattern_codeword;\r
+ u4Byte update_beam_codeword;\r
+ u4Byte ant_num; /*number of smart beam antenna*/\r
+ u4Byte beam_patten_num_each_ant;/*number of beam can be switched in each antenna*/\r
+ u4Byte data_codeword_bit_num;\r
+ u4Byte per_beam_training_pkt_num;\r
+ u1Byte decision_holding_period;\r
+ u4Byte pkt_counter;\r
+ u4Byte fast_training_beam_num;\r
+ u4Byte pre_fast_training_beam_num;\r
+ u4Byte pkt_rssi_pre[SUPPORT_RF_PATH_NUM][SUPPORT_BEAM_PATTERN_NUM];\r
+ u4Byte pkt_rssi_sum[8][SUPPORT_BEAM_PATTERN_NUM];\r
+ u4Byte pkt_rssi_cnt[8][SUPPORT_BEAM_PATTERN_NUM];\r
+ u4Byte rx_idle_beam[SUPPORT_RF_PATH_NUM];\r
+ u4Byte pre_codeword;\r
+ BOOLEAN force_update_beam_en;\r
+\r
+ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) \r
+ RT_WORK_ITEM hl_smart_antenna_workitem;\r
+ RT_WORK_ITEM hl_smart_antenna_decision_workitem; \r
+ #endif\r
+\r
+} SAT_T, *pSAT_T;\r
+#endif\r
+\r
+typedef struct _FAST_ANTENNA_TRAINNING_\r
+{\r
+ u1Byte Bssid[6];\r
+ u1Byte antsel_rx_keep_0;\r
+ u1Byte antsel_rx_keep_1;\r
+ u1Byte antsel_rx_keep_2;\r
+ u1Byte antsel_rx_keep_3;\r
+ u4Byte antSumRSSI[7];\r
+ u4Byte antRSSIcnt[7];\r
+ u4Byte antAveRSSI[7];\r
+ u1Byte FAT_State;\r
+ u4Byte TrainIdx;\r
+ u1Byte antsel_a[ODM_ASSOCIATE_ENTRY_NUM];\r
+ u1Byte antsel_b[ODM_ASSOCIATE_ENTRY_NUM];\r
+ u1Byte antsel_c[ODM_ASSOCIATE_ENTRY_NUM];\r
+ u4Byte MainAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM];\r
+ u4Byte AuxAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM];\r
+ u4Byte MainAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM];\r
+ u4Byte AuxAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM];\r
+ u1Byte RxIdleAnt;\r
+ u1Byte AntDiv_OnOff;\r
+ BOOLEAN bBecomeLinked;\r
+ u4Byte MinMaxRSSI;\r
+ u1Byte idx_AntDiv_counter_2G;\r
+ u1Byte idx_AntDiv_counter_5G;\r
+ u1Byte AntDiv_2G_5G;\r
+ u4Byte CCK_counter_main;\r
+ u4Byte CCK_counter_aux; \r
+ u4Byte OFDM_counter_main;\r
+ u4Byte OFDM_counter_aux;\r
+\r
+ #ifdef ODM_EVM_ENHANCE_ANTDIV\r
+ u4Byte MainAntEVM_Sum[ODM_ASSOCIATE_ENTRY_NUM];\r
+ u4Byte AuxAntEVM_Sum[ODM_ASSOCIATE_ENTRY_NUM];\r
+ u4Byte MainAntEVM_Cnt[ODM_ASSOCIATE_ENTRY_NUM];\r
+ u4Byte AuxAntEVM_Cnt[ODM_ASSOCIATE_ENTRY_NUM];\r
+ BOOLEAN EVM_method_enable;\r
+ u1Byte TargetAnt_EVM;\r
+ u1Byte TargetAnt_CRC32;\r
+ u1Byte TargetAnt_enhance;\r
+ u1Byte pre_TargetAnt_enhance;\r
+ u2Byte Main_MPDU_OK_cnt;\r
+ u2Byte Aux_MPDU_OK_cnt; \r
+\r
+ u4Byte CRC32_Ok_Cnt;\r
+ u4Byte CRC32_Fail_Cnt;\r
+ u4Byte MainCRC32_Ok_Cnt;\r
+ u4Byte AuxCRC32_Ok_Cnt;\r
+ u4Byte MainCRC32_Fail_Cnt;\r
+ u4Byte AuxCRC32_Fail_Cnt;\r
+ #endif \r
+ #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))\r
+ u4Byte CCK_CtrlFrame_Cnt_main;\r
+ u4Byte CCK_CtrlFrame_Cnt_aux;\r
+ u4Byte OFDM_CtrlFrame_Cnt_main;\r
+ u4Byte OFDM_CtrlFrame_Cnt_aux;\r
+ u4Byte MainAnt_CtrlFrame_Sum;\r
+ u4Byte AuxAnt_CtrlFrame_Sum;\r
+ u4Byte MainAnt_CtrlFrame_Cnt;\r
+ u4Byte AuxAnt_CtrlFrame_Cnt;\r
+ #endif\r
+ BOOLEAN fix_ant_bfee;\r
+ BOOLEAN enable_ctrl_frame_antdiv;\r
+ BOOLEAN use_ctrl_frame_antdiv;\r
+ u1Byte hw_antsw_occur;\r
+}FAT_T,*pFAT_T;\r
+\r
+\r
+//1 ============================================================\r
+//1 enumeration\r
+//1 ============================================================\r
+\r
+\r
+\r
+typedef enum _FAT_STATE /*Fast antenna training*/\r
+{\r
+ FAT_BEFORE_LINK_STATE = 0,\r
+ FAT_PREPARE_STATE = 1,\r
+ FAT_TRAINING_STATE = 2,\r
+ FAT_DECISION_STATE = 3\r
+}FAT_STATE_E, *PFAT_STATE_E;\r
+\r
+typedef enum _ANT_DIV_TYPE\r
+{\r
+ CG_TRX_HW_ANTDIV = 0x01,\r
+ CGCS_RX_HW_ANTDIV = 0x02,\r
+ CG_TRX_SMART_ANTDIV = 0x03,\r
+ S0S1_SW_ANTDIV = 0x04, /*8723B intrnal switch S0 S1*/\r
+ HL_SW_SMART_ANT_TYPE1 = 0x10 /*Hong-Lin Smart antenna use for 8821AE which is a 2 Ant. entitys, and each Ant. is equipped with 4 antenna patterns*/\r
+}ANT_DIV_TYPE_E, *PANT_DIV_TYPE_E;\r
+\r
+\r
+//1 ============================================================\r
+//1 function prototype\r
+//1 ============================================================\r
+\r
+\r
+VOID\r
+ODM_StopAntennaSwitchDm(\r
+ IN PVOID pDM_VOID\r
+ );\r
+VOID\r
+ODM_SetAntConfig(\r
+ IN PVOID pDM_VOID,\r
+ IN u1Byte antSetting // 0=A, 1=B, 2=C, ....\r
+ );\r
+\r
+\r
+#define SwAntDivRestAfterLink ODM_SwAntDivRestAfterLink\r
+\r
+VOID ODM_SwAntDivRestAfterLink( \r
+ IN PVOID pDM_VOID\r
+ );\r
+\r
+#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))\r
+\r
+VOID\r
+ODM_UpdateRxIdleAnt(\r
+ IN PVOID pDM_VOID, \r
+ IN u1Byte Ant\r
+);\r
+\r
+#if (RTL8723B_SUPPORT == 1)\r
+VOID\r
+ODM_UpdateRxIdleAnt_8723B(\r
+ IN PVOID pDM_VOID,\r
+ IN u1Byte Ant,\r
+ IN u4Byte DefaultAnt, \r
+ IN u4Byte OptionalAnt\r
+);\r
+#endif\r
+\r
+#if (RTL8188F_SUPPORT == 1)\r
+VOID\r
+phydm_update_rx_idle_antenna_8188F(\r
+ IN PVOID pDM_VOID,\r
+ IN u4Byte default_ant\r
+);\r
+#endif\r
+\r
+\r
+#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY\r
+\r
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
+VOID\r
+ODM_SW_AntDiv_Callback(\r
+ IN PRT_TIMER pTimer\r
+ );\r
+\r
+VOID\r
+ODM_SW_AntDiv_WorkitemCallback(\r
+ IN PVOID pContext\r
+ );\r
+\r
+\r
+#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)\r
+\r
+VOID\r
+ODM_SW_AntDiv_WorkitemCallback(\r
+ IN PVOID pContext\r
+);\r
+\r
+VOID\r
+ODM_SW_AntDiv_Callback(\r
+ void *FunctionContext\r
+ );\r
+\r
+#endif\r
+\r
+VOID\r
+odm_S0S1_SwAntDivByCtrlFrame(\r
+ IN PVOID pDM_VOID,\r
+ IN u1Byte Step\r
+);\r
+\r
+VOID\r
+odm_AntselStatisticsOfCtrlFrame(\r
+ IN PVOID pDM_VOID,\r
+ IN u1Byte antsel_tr_mux,\r
+ IN u4Byte RxPWDBAll\r
+);\r
+\r
+VOID\r
+odm_S0S1_SwAntDivByCtrlFrame_ProcessRSSI(\r
+ IN PVOID pDM_VOID,\r
+ IN PVOID p_phy_info_void,\r
+ IN PVOID p_pkt_info_void\r
+);\r
+\r
+#endif\r
+\r
+#ifdef ODM_EVM_ENHANCE_ANTDIV\r
+VOID\r
+odm_EVM_FastAntTrainingCallback(\r
+ IN PVOID pDM_VOID\r
+);\r
+#endif\r
+\r
+VOID\r
+odm_HW_AntDiv(\r
+ IN PVOID pDM_VOID\r
+);\r
+\r
+#if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) )\r
+VOID\r
+odm_FastAntTraining(\r
+ IN PVOID pDM_VOID\r
+);\r
+\r
+VOID\r
+odm_FastAntTrainingCallback(\r
+ IN PVOID pDM_VOID\r
+);\r
+\r
+VOID\r
+odm_FastAntTrainingWorkItemCallback(\r
+ IN PVOID pDM_VOID\r
+);\r
+#endif\r
+\r
+\r
+#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1\r
+\r
+#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)\r
+VOID\r
+phydm_beam_switch_workitem_callback(\r
+ IN PVOID pContext\r
+ );\r
+\r
+VOID\r
+phydm_beam_decision_workitem_callback(\r
+ IN PVOID pContext\r
+ );\r
+\r
+#endif\r
+\r
+VOID\r
+phydm_update_beam_pattern(\r
+ IN PVOID pDM_VOID,\r
+ IN u4Byte codeword,\r
+ IN u4Byte codeword_length\r
+ );\r
+\r
+void\r
+phydm_set_all_ant_same_beam_num(\r
+ IN PVOID pDM_VOID\r
+ );\r
+\r
+VOID\r
+phydm_hl_smart_ant_cmd(\r
+ IN PVOID pDM_VOID,\r
+ IN u4Byte *const dm_value,\r
+ IN u4Byte *_used,\r
+ OUT char *output,\r
+ IN u4Byte *_out_len\r
+);\r
+\r
+#endif/*#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1*/\r
+\r
+VOID\r
+ODM_AntDivInit(\r
+ IN PVOID pDM_VOID\r
+);\r
+\r
+VOID\r
+ODM_AntDiv(\r
+ IN PVOID pDM_VOID\r
+);\r
+\r
+VOID\r
+odm_AntselStatistics(\r
+ IN PVOID pDM_VOID,\r
+ IN u1Byte antsel_tr_mux,\r
+ IN u4Byte MacId,\r
+ IN u4Byte utility,\r
+ IN u1Byte method\r
+);\r
+\r
+VOID\r
+ODM_Process_RSSIForAntDiv( \r
+ IN OUT PVOID pDM_VOID,\r
+ IN PVOID p_phy_info_void,\r
+ IN PVOID p_pkt_info_void\r
+);\r
+\r
+\r
+\r
+#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))\r
+VOID\r
+ODM_SetTxAntByTxInfo(\r
+ IN PVOID pDM_VOID,\r
+ IN pu1Byte pDesc,\r
+ IN u1Byte macId \r
+);\r
+\r
+#elif(DM_ODM_SUPPORT_TYPE == ODM_AP)\r
+\r
+VOID\r
+ODM_SetTxAntByTxInfo(\r
+ struct rtl8192cd_priv *priv,\r
+ struct tx_desc *pdesc,\r
+ unsigned short aid \r
+);\r
+\r
+#endif\r
+\r
+\r
+VOID\r
+ODM_AntDiv_Config(\r
+ IN PVOID pDM_VOID\r
+);\r
+\r
+VOID\r
+ODM_AntDivTimers(\r
+ IN PVOID pDM_VOID,\r
+ IN u1Byte state\r
+);\r
+\r
+#endif /*#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))*/\r
+\r
+VOID\r
+ODM_AntDivReset(\r
+ IN PVOID pDM_VOID\r
+);\r
+\r
+VOID\r
+odm_AntennaDiversityInit(\r
+ IN PVOID pDM_VOID\r
+);\r
+\r
+VOID\r
+odm_AntennaDiversity(\r
+ IN PVOID pDM_VOID\r
+);\r
+\r
+\r
+#endif /*#ifndef __ODMANTDIV_H__*/\r
projects / firefly-linux-kernel-4.4.55.git / blobdiff