rtl8188eu: update driver to v4.3.0.8_13968.20150417

[firefly-linux-kernel-4.4.55.git] / drivers / net / wireless / rockchip_wlan / rtl8188eu / hal / OUTSRC / PhyDM_Adaptivity.c

diff --git a/drivers/net/wireless/rockchip_wlan/rtl8188eu/hal/OUTSRC/PhyDM_Adaptivity.c b/drivers/net/wireless/rockchip_wlan/rtl8188eu/hal/OUTSRC/PhyDM_Adaptivity.c
index 3395559149ecb1a38a1c3d0b7e84aae097698faa..c39d8c7f90a1486ef83ee6ccbd2a1f6a9023740e 100755 (executable)
--- a/drivers/net/wireless/rockchip_wlan/rtl8188eu/hal/OUTSRC/PhyDM_Adaptivity.c
+++ b/drivers/net/wireless/rockchip_wlan/rtl8188eu/hal/OUTSRC/PhyDM_Adaptivity.c
@@ -368,7 +368,7 @@ Phydm_SearchPwdBLowerBound(
        PDM_ODM_T               pDM_Odm = (PDM_ODM_T)pDM_VOID;\r
        PADAPTIVITY_STATISTICS  Adaptivity = (PADAPTIVITY_STATISTICS)PhyDM_Get_Structure(pDM_Odm, PHYDM_ADAPTIVITY);\r
        u4Byte                  value32 = 0;\r
-       u1Byte                  cnt, IGI_Pause = 0x7f, IGI_Resume = 0x20, IGI = 0x50;           /*IGI = 0x50 for cal EDCCA lower bound*/\r
+       u1Byte                  cnt, IGI_Pause = 0x7f, IGI_Resume = 0x20, IGI = 0x45;           /*IGI = 0x50 for cal EDCCA lower bound*/\r
        u1Byte                  txEdcca1 = 0, txEdcca0 = 0;\r
        BOOLEAN                 bAdjust = TRUE;\r
        s1Byte                  TH_L2H_dmc, TH_H2L_dmc, IGI_target = 0x32;\r
@@ -387,7 +387,7 @@ Phydm_SearchPwdBLowerBound(
        ODM_delay_ms(5);\r
 \r
        while (bAdjust) {\r
-               for (cnt = 0; cnt < 250; cnt++) {\r
+               for (cnt = 0; cnt < 20; cnt++) {\r
                        if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES)\r
                                value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_RPT_11N, bMaskDWord);\r
 #if (RTL8195A_SUPPORT == 0)\r
@@ -538,7 +538,6 @@ Phydm_AdaptivityInit(
 #else\r
        if (pDM_Odm->SupportICType & ODM_RTL8814A) {            /*8814a no need to find pwdB lower bound, maybe*/\r
                ODM_SetBBReg(pDM_Odm, ODM_REG_EDCCA_DOWN_OPT, BIT30 | BIT29 | BIT28, 0x7);              /*interfernce need > 2^x us, and then EDCCA will be 1*/\r
-               ODM_SetBBReg(pDM_Odm, ODM_REG_EDCCA_POWER_CAL, BIT5, 1);                                                /*0:mean, 1:max pwdB*/\r
                ODM_SetBBReg(pDM_Odm, ODM_REG_ACBB_EDCCA_ENHANCE, BIT29 | BIT28, 0x1);          /*0:rx_dfir, 1: dcnf_out, 2 :rx_iq, 3: rx_nbi_nf_out*/\r
        } else\r
                Phydm_SearchPwdBLowerBound(pDM_Odm);\r