ath9k: Remove ATH_BTCOEX_CFG_NONE checks

[firefly-linux-kernel-4.4.55.git] / drivers / net / wireless / ath / ath9k / hw.h

diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index f389b3c93cf3f4431a8af0ec57f14b332212b7e6..5f5f57421249c7e41de5fbbb2bee0fb12696923d 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -59,9 +59,6 @@
 #define AT9285_COEX3WIRE_SA_SUBSYSID   0x30aa
 #define AT9285_COEX3WIRE_DA_SUBSYSID   0x30ab
 
-#define AR9300_NUM_BT_WEIGHTS   4
-#define AR9300_NUM_WLAN_WEIGHTS 4
-
 #define ATH_AMPDU_LIMIT_MAX        (64 * 1024 - 1)
 
 #define        ATH_DEFAULT_NOISE_FLOOR -95
@@ -129,6 +126,16 @@
 #define AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL  4
 #define AR_GPIO_OUTPUT_MUX_AS_MAC_NETWORK_LED    5
 #define AR_GPIO_OUTPUT_MUX_AS_MAC_POWER_LED      6
+#define AR_GPIO_OUTPUT_MUX_AS_MCI_WLAN_DATA      0x16
+#define AR_GPIO_OUTPUT_MUX_AS_MCI_WLAN_CLK       0x17
+#define AR_GPIO_OUTPUT_MUX_AS_MCI_BT_DATA        0x18
+#define AR_GPIO_OUTPUT_MUX_AS_MCI_BT_CLK         0x19
+#define AR_GPIO_OUTPUT_MUX_AS_WL_IN_TX           0x14
+#define AR_GPIO_OUTPUT_MUX_AS_WL_IN_RX           0x13
+#define AR_GPIO_OUTPUT_MUX_AS_BT_IN_TX           9
+#define AR_GPIO_OUTPUT_MUX_AS_BT_IN_RX           8
+#define AR_GPIO_OUTPUT_MUX_AS_RUCKUS_STROBE      0x1d
+#define AR_GPIO_OUTPUT_MUX_AS_RUCKUS_DATA        0x1e
 
 #define AR_GPIOD_MASK               0x00001FFF
 #define AR_GPIO_BIT(_gpio)          (1 << (_gpio))
@@ -189,20 +196,25 @@ enum ath_ini_subsys {
 enum ath9k_hw_caps {
        ATH9K_HW_CAP_HT                         = BIT(0),
        ATH9K_HW_CAP_RFSILENT                   = BIT(1),
-       ATH9K_HW_CAP_CST                        = BIT(2),
-       ATH9K_HW_CAP_AUTOSLEEP                  = BIT(4),
-       ATH9K_HW_CAP_4KB_SPLITTRANS             = BIT(5),
-       ATH9K_HW_CAP_EDMA                       = BIT(6),
-       ATH9K_HW_CAP_RAC_SUPPORTED              = BIT(7),
-       ATH9K_HW_CAP_LDPC                       = BIT(8),
-       ATH9K_HW_CAP_FASTCLOCK                  = BIT(9),
-       ATH9K_HW_CAP_SGI_20                     = BIT(10),
-       ATH9K_HW_CAP_PAPRD                      = BIT(11),
-       ATH9K_HW_CAP_ANT_DIV_COMB               = BIT(12),
-       ATH9K_HW_CAP_2GHZ                       = BIT(13),
-       ATH9K_HW_CAP_5GHZ                       = BIT(14),
-       ATH9K_HW_CAP_APM                        = BIT(15),
-       ATH9K_HW_CAP_RTT                        = BIT(16),
+       ATH9K_HW_CAP_AUTOSLEEP                  = BIT(2),
+       ATH9K_HW_CAP_4KB_SPLITTRANS             = BIT(3),
+       ATH9K_HW_CAP_EDMA                       = BIT(4),
+       ATH9K_HW_CAP_RAC_SUPPORTED              = BIT(5),
+       ATH9K_HW_CAP_LDPC                       = BIT(6),
+       ATH9K_HW_CAP_FASTCLOCK                  = BIT(7),
+       ATH9K_HW_CAP_SGI_20                     = BIT(8),
+       ATH9K_HW_CAP_PAPRD                      = BIT(9),
+       ATH9K_HW_CAP_ANT_DIV_COMB               = BIT(10),
+       ATH9K_HW_CAP_2GHZ                       = BIT(11),
+       ATH9K_HW_CAP_5GHZ                       = BIT(12),
+       ATH9K_HW_CAP_APM                        = BIT(13),
+       ATH9K_HW_CAP_RTT                        = BIT(14),
+#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
+       ATH9K_HW_CAP_MCI                        = BIT(15),
+#else
+       ATH9K_HW_CAP_MCI                        = 0,
+#endif
+       ATH9K_HW_CAP_DFS                        = BIT(16),
 };
 
 struct ath9k_hw_capabilities {
@@ -268,6 +280,7 @@ enum ath9k_int {
        ATH9K_INT_TX = 0x00000040,
        ATH9K_INT_TXDESC = 0x00000080,
        ATH9K_INT_TIM_TIMER = 0x00000100,
+       ATH9K_INT_MCI = 0x00000200,
        ATH9K_INT_BB_WATCHDOG = 0x00000400,
        ATH9K_INT_TXURN = 0x00000800,
        ATH9K_INT_MIB = 0x00001000,
@@ -789,10 +802,9 @@ struct ath_hw {
        int firpwr[5];
        enum ath9k_ani_cmd ani_function;
 
-       /* Bluetooth coexistance */
+#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
        struct ath_btcoex_hw btcoex_hw;
-       u32 bt_coex_bt_weight[AR9300_NUM_BT_WEIGHTS];
-       u32 bt_coex_wlan_weight[AR9300_NUM_WLAN_WEIGHTS];
+#endif
 
        u32 intr_txqs;
        u8 txchainmask;
@@ -850,7 +862,7 @@ struct ath_hw {
        u32 ts_paddr_start;
        u32 ts_paddr_end;
        u16 ts_tail;
-       u8 ts_size;
+       u16 ts_size;
 
        u32 bb_watchdog_last_status;
        u32 bb_watchdog_timeout_ms; /* in ms, 0 to disable */
@@ -948,7 +960,6 @@ bool ath9k_hw_disable(struct ath_hw *ah);
 void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit, bool test);
 void ath9k_hw_setopmode(struct ath_hw *ah);
 void ath9k_hw_setmcastfilter(struct ath_hw *ah, u32 filter0, u32 filter1);
-void ath9k_hw_setbssidmask(struct ath_hw *ah);
 void ath9k_hw_write_associd(struct ath_hw *ah);
 u32 ath9k_hw_gettsf32(struct ath_hw *ah);
 u64 ath9k_hw_gettsf64(struct ath_hw *ah);
@@ -1041,6 +1052,32 @@ void ath9k_ani_reset(struct ath_hw *ah, bool is_scanning);
 void ath9k_hw_proc_mib_event(struct ath_hw *ah);
 void ath9k_hw_ani_monitor(struct ath_hw *ah, struct ath9k_channel *chan);
 
+#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
+static inline bool ath9k_hw_btcoex_is_enabled(struct ath_hw *ah)
+{
+       return ah->btcoex_hw.enabled;
+}
+void ath9k_hw_btcoex_enable(struct ath_hw *ah);
+static inline enum ath_btcoex_scheme
+ath9k_hw_get_btcoex_scheme(struct ath_hw *ah)
+{
+       return ah->btcoex_hw.scheme;
+}
+#else
+static inline bool ath9k_hw_btcoex_is_enabled(struct ath_hw *ah)
+{
+       return false;
+}
+static inline void ath9k_hw_btcoex_enable(struct ath_hw *ah)
+{
+}
+static inline enum ath_btcoex_scheme
+ath9k_hw_get_btcoex_scheme(struct ath_hw *ah)
+{
+       return ATH_BTCOEX_CFG_NONE;
+}
+#endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */
+
 #define ATH9K_CLOCK_RATE_CCK           22
 #define ATH9K_CLOCK_RATE_5GHZ_OFDM     40
 #define ATH9K_CLOCK_RATE_2GHZ_OFDM     44