e1000e: cleanup: remove unreachable statement
[firefly-linux-kernel-4.4.55.git] / drivers / net / ethernet / intel / e1000e / ich8lan.c
index d99548ce4da7a186da612943aa1889c9aaf147f8..f5d7282afdf3b6614775b074aedfeeee55991473 100644 (file)
@@ -1,7 +1,7 @@
 /*******************************************************************************
 
   Intel PRO/1000 Linux driver
-  Copyright(c) 1999 - 2011 Intel Corporation.
+  Copyright(c) 1999 - 2012 Intel Corporation.
 
   This program is free software; you can redistribute it and/or modify it
   under the terms and conditions of the GNU General Public License,
@@ -280,8 +280,8 @@ static inline void __ew32flash(struct e1000_hw *hw, unsigned long reg, u32 val)
 
 #define er16flash(reg)         __er16flash(hw, (reg))
 #define er32flash(reg)         __er32flash(hw, (reg))
-#define ew16flash(reg,val)     __ew16flash(hw, (reg), (val))
-#define ew32flash(reg,val)     __ew32flash(hw, (reg), (val))
+#define ew16flash(reg, val)    __ew16flash(hw, (reg), (val))
+#define ew32flash(reg, val)    __ew32flash(hw, (reg), (val))
 
 static void e1000_toggle_lanphypc_value_ich8lan(struct e1000_hw *hw)
 {
@@ -553,9 +553,8 @@ static s32 e1000_init_nvm_params_ich8lan(struct e1000_hw *hw)
  *  Initialize family-specific MAC parameters and function
  *  pointers.
  **/
-static s32 e1000_init_mac_params_ich8lan(struct e1000_adapter *adapter)
+static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)
 {
-       struct e1000_hw *hw = &adapter->hw;
        struct e1000_mac_info *mac = &hw->mac;
 
        /* Set media type function pointer */
@@ -775,7 +774,7 @@ static s32 e1000_get_variants_ich8lan(struct e1000_adapter *adapter)
        struct e1000_hw *hw = &adapter->hw;
        s32 rc;
 
-       rc = e1000_init_mac_params_ich8lan(adapter);
+       rc = e1000_init_mac_params_ich8lan(hw);
        if (rc)
                return rc;
 
@@ -902,8 +901,7 @@ static s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw)
        }
 
        if (!timeout) {
-               e_dbg("Failed to acquire the semaphore, FW or HW has it: "
-                     "FWSM=0x%8.8x EXTCNF_CTRL=0x%8.8x)\n",
+               e_dbg("Failed to acquire the semaphore, FW or HW has it: FWSM=0x%8.8x EXTCNF_CTRL=0x%8.8x)\n",
                      er32(FWSM), extcnf_ctrl);
                extcnf_ctrl &= ~E1000_EXTCNF_CTRL_SWFLAG;
                ew32(EXTCNF_CTRL, extcnf_ctrl);
@@ -1067,7 +1065,7 @@ static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw)
 
        data = er32(FEXTNVM);
        if (!(data & sw_cfg_mask))
-               goto out;
+               goto release;
 
        /*
         * Make sure HW does not configure LCD from PHY
@@ -1076,14 +1074,14 @@ static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw)
        data = er32(EXTCNF_CTRL);
        if (!(hw->mac.type == e1000_pch2lan)) {
                if (data & E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE)
-                       goto out;
+                       goto release;
        }
 
        cnf_size = er32(EXTCNF_SIZE);
        cnf_size &= E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_MASK;
        cnf_size >>= E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_SHIFT;
        if (!cnf_size)
-               goto out;
+               goto release;
 
        cnf_base_addr = data & E1000_EXTCNF_CTRL_EXT_CNF_POINTER_MASK;
        cnf_base_addr >>= E1000_EXTCNF_CTRL_EXT_CNF_POINTER_SHIFT;
@@ -1099,13 +1097,13 @@ static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw)
                 */
                ret_val = e1000_write_smbus_addr(hw);
                if (ret_val)
-                       goto out;
+                       goto release;
 
                data = er32(LEDCTL);
                ret_val = e1000_write_phy_reg_hv_locked(hw, HV_LED_CONFIG,
                                                        (u16)data);
                if (ret_val)
-                       goto out;
+                       goto release;
        }
 
        /* Configure LCD from extended configuration region. */
@@ -1117,12 +1115,12 @@ static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw)
                ret_val = e1000_read_nvm(hw, (word_addr + i * 2), 1,
                                         &reg_data);
                if (ret_val)
-                       goto out;
+                       goto release;
 
                ret_val = e1000_read_nvm(hw, (word_addr + i * 2 + 1),
                                         1, &reg_addr);
                if (ret_val)
-                       goto out;
+                       goto release;
 
                /* Save off the PHY page for future writes. */
                if (reg_addr == IGP01E1000_PHY_PAGE_SELECT) {
@@ -1136,10 +1134,10 @@ static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw)
                ret_val = phy->ops.write_reg_locked(hw, (u32)reg_addr,
                                                    reg_data);
                if (ret_val)
-                       goto out;
+                       goto release;
        }
 
-out:
+release:
        hw->phy.ops.release(hw);
        return ret_val;
 }
@@ -1304,18 +1302,18 @@ static s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state)
        if (!(hw->mac.type == e1000_pch2lan)) {
                mac_reg = er32(EXTCNF_CTRL);
                if (mac_reg & E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE)
-                       goto out;
+                       goto release;
        }
 
        mac_reg = er32(FEXTNVM);
        if (!(mac_reg & E1000_FEXTNVM_SW_CONFIG_ICH8M))
-               goto out;
+               goto release;
 
        mac_reg = er32(PHY_CTRL);
 
        ret_val = hw->phy.ops.read_reg_locked(hw, HV_OEM_BITS, &oem_reg);
        if (ret_val)
-               goto out;
+               goto release;
 
        oem_reg &= ~(HV_OEM_BITS_GBE_DIS | HV_OEM_BITS_LPLU);
 
@@ -1341,7 +1339,7 @@ static s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state)
 
        ret_val = hw->phy.ops.write_reg_locked(hw, HV_OEM_BITS, oem_reg);
 
-out:
+release:
        hw->phy.ops.release(hw);
 
        return ret_val;
@@ -1763,7 +1761,6 @@ static void e1000_gate_hw_phy_config_ich8lan(struct e1000_hw *hw, bool gate)
                extcnf_ctrl &= ~E1000_EXTCNF_CTRL_GATE_PHY_CFG;
 
        ew32(EXTCNF_CTRL, extcnf_ctrl);
-       return;
 }
 
 /**
@@ -1921,7 +1918,9 @@ static s32 e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active)
        else
                oem_reg &= ~HV_OEM_BITS_LPLU;
 
-       oem_reg |= HV_OEM_BITS_RESTART_AN;
+       if (!e1000_check_reset_block(hw))
+               oem_reg |= HV_OEM_BITS_RESTART_AN;
+
        ret_val = e1e_wphy(hw, HV_OEM_BITS, oem_reg);
 
 out:
@@ -1949,7 +1948,7 @@ static s32 e1000_set_d0_lplu_state_ich8lan(struct e1000_hw *hw, bool active)
        u16 data;
 
        if (phy->type == e1000_phy_ife)
-               return ret_val;
+               return 0;
 
        phy_ctrl = er32(PHY_CTRL);
 
@@ -2031,7 +2030,7 @@ static s32 e1000_set_d3_lplu_state_ich8lan(struct e1000_hw *hw, bool active)
 {
        struct e1000_phy_info *phy = &hw->phy;
        u32 phy_ctrl;
-       s32 ret_val;
+       s32 ret_val = 0;
        u16 data;
 
        phy_ctrl = er32(PHY_CTRL);
@@ -2097,7 +2096,7 @@ static s32 e1000_set_d3_lplu_state_ich8lan(struct e1000_hw *hw, bool active)
                ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG, data);
        }
 
-       return 0;
+       return ret_val;
 }
 
 /**
@@ -2130,8 +2129,7 @@ static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank)
 
                        return 0;
                }
-               e_dbg("Unable to determine valid NVM bank via EEC - "
-                      "reading flash signature\n");
+               e_dbg("Unable to determine valid NVM bank via EEC - reading flash signature\n");
                /* fall-thru */
        default:
                /* set bank to 0 in case flash read fails */
@@ -2163,8 +2161,6 @@ static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank)
                e_dbg("ERROR: No valid NVM bank present\n");
                return -E1000_ERR_NVM;
        }
-
-       return 0;
 }
 
 /**
@@ -2243,8 +2239,7 @@ static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw)
 
        /* Check if the flash descriptor is valid */
        if (hsfsts.hsf_status.fldesvalid == 0) {
-               e_dbg("Flash descriptor invalid.  "
-                        "SW Sequencing must be used.\n");
+               e_dbg("Flash descriptor invalid.  SW Sequencing must be used.\n");
                return -E1000_ERR_NVM;
        }
 
@@ -2280,14 +2275,14 @@ static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw)
                 * cycle has a chance to end before giving up.
                 */
                for (i = 0; i < ICH_FLASH_READ_COMMAND_TIMEOUT; i++) {
-                       hsfsts.regval = __er16flash(hw, ICH_FLASH_HSFSTS);
+                       hsfsts.regval = er16flash(ICH_FLASH_HSFSTS);
                        if (hsfsts.hsf_status.flcinprog == 0) {
                                ret_val = 0;
                                break;
                        }
                        udelay(1);
                }
-               if (ret_val == 0) {
+               if (!ret_val) {
                        /*
                         * Successful in waiting for previous cycle to timeout,
                         * now set the Flash Cycle Done.
@@ -2405,7 +2400,7 @@ static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
                udelay(1);
                /* Steps */
                ret_val = e1000_flash_cycle_init_ich8lan(hw);
-               if (ret_val != 0)
+               if (ret_val)
                        break;
 
                hsflctl.regval = er16flash(ICH_FLASH_HSFCTL);
@@ -2425,7 +2420,7 @@ static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
                 * read in (shift in) the Flash Data0, the order is
                 * least significant byte first msb to lsb
                 */
-               if (ret_val == 0) {
+               if (!ret_val) {
                        flash_data = er32flash(ICH_FLASH_FDATA0);
                        if (size == 1)
                                *data = (u8)(flash_data & 0x000000FF);
@@ -2444,8 +2439,7 @@ static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
                                /* Repeat for some time before giving up. */
                                continue;
                        } else if (hsfsts.hsf_status.flcdone == 0) {
-                               e_dbg("Timeout error - flash cycle "
-                                        "did not complete.\n");
+                               e_dbg("Timeout error - flash cycle did not complete.\n");
                                break;
                        }
                }
@@ -2796,8 +2790,7 @@ static s32 e1000_write_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
                        /* Repeat for some time before giving up. */
                        continue;
                if (hsfsts.hsf_status.flcdone == 0) {
-                       e_dbg("Timeout error - flash cycle "
-                                "did not complete.");
+                       e_dbg("Timeout error - flash cycle did not complete.\n");
                        break;
                }
        } while (count++ < ICH_FLASH_CYCLE_REPEAT_COUNT);
@@ -2939,7 +2932,7 @@ static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank)
 
                        ret_val = e1000_flash_cycle_ich8lan(hw,
                                               ICH_FLASH_ERASE_COMMAND_TIMEOUT);
-                       if (ret_val == 0)
+                       if (!ret_val)
                                break;
 
                        /*
@@ -3771,8 +3764,6 @@ void e1000_resume_workarounds_pchlan(struct e1000_hw *hw)
 
 release:
        hw->phy.ops.release(hw);
-
-       return;
 }
 
 /**