irq_set_chip_data(irq, asic);
irq_set_handler(irq, handle_level_irq);
- set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+ irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
}
asic3_write_register(asic, ASIC3_OFFSET(INTR, INT_MASK),
ASIC3_INTMASK_GINTMASK);
- irq_set_chained_handler(asic->irq_nr, asic3_irq_demux);
+ irq_set_chained_handler_and_data(asic->irq_nr, asic3_irq_demux, asic);
irq_set_irq_type(asic->irq_nr, IRQ_TYPE_EDGE_RISING);
- irq_set_handler_data(asic->irq_nr, asic);
return 0;
}
irq_base = asic->irq_base;
for (irq = irq_base; irq < irq_base + ASIC3_NR_IRQS; irq++) {
- set_irq_flags(irq, 0);
+ irq_set_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
irq_set_chip_and_handler(irq, NULL, NULL);
irq_set_chip_data(irq, NULL);
}