-\r
-#include <mach/iomux.h>\r
-#include <media/soc_camera.h>\r
-#include <linux/android_pmem.h>\r
-#include <mach/rk30_camera.h>\r
-#ifndef PMEM_CAM_SIZE\r
-#include "../../../arch/arm/plat-rk/rk_camera.c"\r
-#else\r
-/*****************************************************************************************\r
- * camera devices\r
- * author: ddl@rock-chips.com\r
- *****************************************************************************************/\r
-#ifdef CONFIG_VIDEO_RK29 \r
-\r
-static int rk_sensor_iomux(int pin)\r
-{ \r
- switch (pin)\r
- {\r
- case RK30_PIN0_PA0: \r
- {\r
- rk30_mux_api_set(GPIO0A0_HDMIHOTPLUGIN_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PA1: \r
- {\r
- rk30_mux_api_set(GPIO0A1_HDMII2CSCL_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PA2:\r
- {\r
- rk30_mux_api_set(GPIO0A2_HDMII2CSDA_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PA3:\r
- {\r
- rk30_mux_api_set(GPIO0A3_PWM0_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PA4:\r
- {\r
- rk30_mux_api_set(GPIO0A4_PWM1_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PA5:\r
- {\r
- rk30_mux_api_set(GPIO0A5_OTGDRVVBUS_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PA6:\r
- {\r
- rk30_mux_api_set(GPIO0A6_HOSTDRVVBUS_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PA7:\r
- {\r
- rk30_mux_api_set(GPIO0A7_I2S8CHSDI_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PB0:\r
- {\r
- rk30_mux_api_set(GPIO0B0_I2S8CHCLK_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PB1:\r
- {\r
- rk30_mux_api_set(GPIO0B1_I2S8CHSCLK_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PB2:\r
- {\r
- rk30_mux_api_set(GPIO0B2_I2S8CHLRCKRX_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PB3:\r
- {\r
- rk30_mux_api_set(GPIO0B3_I2S8CHLRCKTX_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PB4:\r
- {\r
- rk30_mux_api_set(GPIO0B4_I2S8CHSDO0_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PB5:\r
- {\r
- rk30_mux_api_set(GPIO0B5_I2S8CHSDO1_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PB6:\r
- {\r
- rk30_mux_api_set(GPIO0B6_I2S8CHSDO2_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PB7:\r
- {\r
- rk30_mux_api_set(GPIO0B7_I2S8CHSDO3_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PC0:\r
- {\r
- rk30_mux_api_set(GPIO0C0_I2S12CHCLK_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PC1:\r
- {\r
- rk30_mux_api_set(GPIO0C1_I2S12CHSCLK_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PC2:\r
- {\r
- rk30_mux_api_set(GPIO0C2_I2S12CHLRCKRX_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PC3:\r
- {\r
- rk30_mux_api_set(GPIO0C3_I2S12CHLRCKTX_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PC4:\r
- {\r
- rk30_mux_api_set(GPIO0C4_I2S12CHSDI_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PC5:\r
- {\r
- rk30_mux_api_set(GPIO0C5_I2S12CHSDO_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PC6:\r
- {\r
- rk30_mux_api_set(GPIO0C6_TRACECLK_SMCADDR2_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PC7:\r
- {\r
- rk30_mux_api_set(GPIO0C7_TRACECTL_SMCADDR3_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PD0:\r
- {\r
- rk30_mux_api_set(GPIO0D0_I2S22CHCLK_SMCCSN0_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PD1:\r
- {\r
- rk30_mux_api_set(GPIO0D1_I2S22CHSCLK_SMCWEN_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PD2:\r
- {\r
- rk30_mux_api_set(GPIO0D2_I2S22CHLRCKRX_SMCOEN_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PD3:\r
- {\r
- rk30_mux_api_set(GPIO0D3_I2S22CHLRCKTX_SMCADVN_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PD4:\r
- {\r
- rk30_mux_api_set(GPIO0D4_I2S22CHSDI_SMCADDR0_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PD5:\r
- {\r
- rk30_mux_api_set(GPIO0D5_I2S22CHSDO_SMCADDR1_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PD6:\r
- {\r
- rk30_mux_api_set(GPIO0D6_PWM2_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN0_PD7:\r
- {\r
- rk30_mux_api_set(GPIO0D7_PWM3_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PA0:\r
- {\r
- rk30_mux_api_set(GPIO1A0_UART0SIN_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PA1:\r
- {\r
- rk30_mux_api_set(GPIO1A1_UART0SOUT_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PA2:\r
- {\r
- rk30_mux_api_set(GPIO1A2_UART0CTSN_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PA3:\r
- {\r
- rk30_mux_api_set(GPIO1A3_UART0RTSN_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PA4:\r
- {\r
- rk30_mux_api_set(GPIO1A4_UART1SIN_SPI0CSN0_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PA5:\r
- {\r
- rk30_mux_api_set(GPIO1A5_UART1SOUT_SPI0CLK_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PA6:\r
- {\r
- rk30_mux_api_set(GPIO1A6_UART1CTSN_SPI0RXD_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PA7:\r
- {\r
- rk30_mux_api_set(GPIO1A7_UART1RTSN_SPI0TXD_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PB0:\r
- {\r
- rk30_mux_api_set(GPIO1B0_UART2SIN_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PB1:\r
- {\r
- rk30_mux_api_set(GPIO1B1_UART2SOUT_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PB2:\r
- {\r
- rk30_mux_api_set(GPIO1B2_SPDIFTX_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PB3:\r
- {\r
- rk30_mux_api_set(GPIO1B3_CIF0CLKOUT_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PB4:\r
- {\r
- rk30_mux_api_set(GPIO1B4_CIF0DATA0_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PB5:\r
- {\r
- rk30_mux_api_set(GPIO1B5_CIF0DATA1_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PB6:\r
- {\r
- rk30_mux_api_set(GPIO1B6_CIFDATA10_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PB7:\r
- {\r
- rk30_mux_api_set(GPIO1B7_CIFDATA11_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PC0:\r
- {\r
- rk30_mux_api_set(GPIO1C0_CIF1DATA2_RMIICLKOUT_RMIICLKIN_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PC1:\r
- {\r
- rk30_mux_api_set(GPIO1C1_CIFDATA3_RMIITXEN_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PC2:\r
- {\r
- rk30_mux_api_set(GPIO1C2_CIF1DATA4_RMIITXD1_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PC3:\r
- {\r
- rk30_mux_api_set(GPIO1C3_CIFDATA5_RMIITXD0_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PC4:\r
- {\r
- rk30_mux_api_set(GPIO1C4_CIFDATA6_RMIIRXERR_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PC5:\r
- {\r
- rk29_mux_api_set(GPIO1C5_CIFDATA7_RMIICRSDVALID_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PC6:\r
- {\r
- rk30_mux_api_set(GPIO1C6_CIFDATA8_RMIIRXD1_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PC7:\r
- {\r
- rk30_mux_api_set(GPIO1C7_CIFDATA9_RMIIRXD0_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PD0:\r
- {\r
- rk30_mux_api_set(GPIO1D0_CIF1VSYNC_MIIMD_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PD1:\r
- {\r
- rk30_mux_api_set(GPIO1D1_CIF1HREF_MIIMDCLK_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PD2:\r
- {\r
- rk30_mux_api_set(GPIO1D2_CIF1CLKIN_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PD3:\r
- {\r
- rk30_mux_api_set(GPIO1D3_CIF1DATA0_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PD4:\r
- {\r
- rk30_mux_api_set(GPIO1D4_CIF1DATA1_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PD5:\r
- {\r
- rk30_mux_api_set(GPIO1D5_CIF1DATA10_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PD6:\r
- {\r
- rk30_mux_api_set(GPIO1D6_CIF1DATA11_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN1_PD7:\r
- {\r
- rk30_mux_api_set(GPIO1D7_CIF1CLKOUT_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PA0:\r
- {\r
- rk30_mux_api_set(GPIO2A0_LCDC1DATA0_SMCADDR4_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PA1:\r
- {\r
- rk30_mux_api_set(GPIO2A1_LCDC1DATA1_SMCADDR5_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PA2:\r
- {\r
- rk30_mux_api_set(GPIO2A2_LCDCDATA2_SMCADDR6_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PA3:\r
- {\r
- rk30_mux_api_set(GPIO2A3_LCDCDATA3_SMCADDR7_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PA4:\r
- {\r
- rk30_mux_api_set(GPIO2A4_LCDC1DATA4_SMCADDR8_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PA5:\r
- {\r
- rk30_mux_api_set(GPIO2A5_LCDC1DATA5_SMCADDR9_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PA6:\r
- {\r
- rk30_mux_api_set(GPIO2A6_LCDC1DATA6_SMCADDR10_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PA7:\r
- {\r
- rk30_mux_api_set(GPIO2A7_LCDC1DATA7_SMCADDR11_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PB0:\r
- {\r
- rk30_mux_api_set(GPIO2B0_LCDC1DATA8_SMCADDR12_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PB1:\r
- {\r
- rk30_mux_api_set(GPIO2B1_LCDC1DATA9_SMCADDR13_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PB2:\r
- {\r
- rk30_mux_api_set(GPIO2B2_LCDC1DATA10_SMCADDR14_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PB3:\r
- {\r
- rk30_mux_api_set(GPIO2B3_LCDC1DATA11_SMCADDR15_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PB4:\r
- {\r
- rk30_mux_api_set(GPIO2B4_LCDC1DATA12_SMCADDR16_HSADCDATA9_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PB5:\r
- {\r
- rk30_mux_api_set(GPIO2B5_LCDC1DATA13_SMCADDR17_HSADCDATA8_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PB6:\r
- {\r
- rk30_mux_api_set(GPIO2B6_LCDC1DATA14_SMCADDR18_TSSYNC_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PB7:\r
- {\r
- rk30_mux_api_set(GPIO2B7_LCDC1DATA15_SMCADDR19_HSADCDATA7_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PC0:\r
- {\r
- rk30_mux_api_set(GPIO2C0_LCDCDATA16_GPSCLK_HSADCCLKOUT_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PC1:\r
- {\r
- rk30_mux_api_set(GPIO2C1_LCDC1DATA17_SMCBLSN0_HSADCDATA6_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PC2:\r
- {\r
- rk30_mux_api_set(GPIO2C2_LCDC1DATA18_SMCBLSN1_HSADCDATA5_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PC3:\r
- {\r
- rk29_mux_api_set(GPIO2C3_LCDC1DATA19_SPI1CLK_HSADCDATA0_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PC4:\r
- {\r
- rk30_mux_api_set(GPIO2C4_LCDC1DATA20_SPI1CSN0_HSADCDATA1_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PC5:\r
- {\r
- rk30_mux_api_set(GPIO2C5_LCDC1DATA21_SPI1TXD_HSADCDATA2_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PC6:\r
- {\r
- rk30_mux_api_set(GPIO2C6_LCDC1DATA22_SPI1RXD_HSADCDATA3_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PC7:\r
- {\r
- rk30_mux_api_set(GPIO2C7_LCDC1DATA23_SPI1CSN1_HSADCDATA4_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PD0:\r
- {\r
- rk30_mux_api_set(GPIO2D0_LCDC1DCLK_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PD1:\r
- {\r
- rk30_mux_api_set(GPIO2D1_LCDC1DEN_SMCCSN1_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PD2:\r
- {\r
- rk30_mux_api_set(GPIO2D2_LCDC1HSYNC_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PD3:\r
- {\r
- rk30_mux_api_set(GPIO2D3_LCDC1VSYNC_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PD4:\r
- {\r
- rk30_mux_api_set(GPIO2D4_I2C0SDA_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PD5:\r
- {\r
- rk30_mux_api_set(GPIO2D5_I2C0SCL_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PD6:\r
- {\r
- rk30_mux_api_set(GPIO2D6_I2C1SDA_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN2_PD7:\r
- {\r
- rk30_mux_api_set(GPIO2D7_I2C1SCL_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PA0:\r
- {\r
- rk30_mux_api_set(GPIO3A0_I2C2SDA_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PA1:\r
- {\r
- rk30_mux_api_set(GPIO3A1_I2C2SCL_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PA2:\r
- {\r
- rk30_mux_api_set(GPIO3A2_I2C3SDA_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PA3:\r
- {\r
- rk30_mux_api_set(GPIO3A3_I2C3SCL_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PA4:\r
- {\r
- rk30_mux_api_set(GPIO3A4_I2C4SDA_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PA5:\r
- {\r
- rk30_mux_api_set(GPIO3A5_I2C4SCL_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PA6:\r
- {\r
- rk30_mux_api_set(GPIO3A6_SDMMC0RSTNOUT_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PA7:\r
- {\r
- rk30_mux_api_set(GPIO3A7_SDMMC0PWREN_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PB0:\r
- {\r
- rk30_mux_api_set(GPIO3B0_SDMMC0CLKOUT_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PB1:\r
- {\r
- rk30_mux_api_set(GPIO3B1_SDMMC0CMD_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PB2:\r
- {\r
- rk30_mux_api_set(GPIO3B2_SDMMC0DATA0_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PB3:\r
- {\r
- rk30_mux_api_set(GPIO3B3_SDMMC0DATA1_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PB4:\r
- {\r
- rk30_mux_api_set(GPIO3B4_SDMMC0DATA2_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PB5:\r
- {\r
- rk30_mux_api_set(GPIO3B5_SDMMC0DATA3_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PB6:\r
- {\r
- rk30_mux_api_set(GPIO3B6_SDMMC0DETECTN_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PB7:\r
- {\r
- rk30_mux_api_set(GPIO3B7_SDMMC0WRITEPRT_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PC0:\r
- {\r
- rk30_mux_api_set(GPIO3C0_SMMC1CMD_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PC1:\r
- {\r
- rk30_mux_api_set(GPIO3C1_SDMMC1DATA0_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PC2:\r
- {\r
- rk30_mux_api_set(GPIO3C2_SDMMC1DATA1_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PC3:\r
- {\r
- rk30_mux_api_set(GPIO3C3_SDMMC1DATA2_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PC4:\r
- {\r
- rk30_mux_api_set(GPIO3C4_SDMMC1DATA3_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PC5:\r
- {\r
- rk30_mux_api_set(GPIO3C5_SDMMC1CLKOUT_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PC6:\r
- {\r
- rk30_mux_api_set(GPIO3C6_SDMMC1DETECTN_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PC7:\r
- {\r
- rk30_mux_api_set(GPIO3C7_SDMMC1WRITEPRT_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PD0:\r
- {\r
- rk30_mux_api_set(GPIO3D0_SDMMC1PWREN_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PD1:\r
- {\r
- rk30_mux_api_set(GPIO3D1_SDMMC1BACKENDPWR_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PD2:\r
- {\r
- rk30_mux_api_set(GPIO3D2_SDMMC1INTN_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PD3:\r
- {\r
- rk30_mux_api_set(GPIO3D3_UART3SIN_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PD4:\r
- {\r
- rk30_mux_api_set(GPIO3D4_UART3SOUT_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PD5:\r
- {\r
- rk30_mux_api_set(GPIO3D5_UART3CTSN_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PD6:\r
- {\r
- rk30_mux_api_set(GPIO3D6_UART3RTSN_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN3_PD7:\r
- {\r
- rk30_mux_api_set(GPIO3D7_FLASHDQS_EMMCCLKOUT_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN4_PA0:\r
- {\r
- rk30_mux_api_set(GPIO4A0_FLASHDATA8_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN4_PA1:\r
- {\r
- rk30_mux_api_set(GPIO4A1_FLASHDATA9_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN4_PA2:\r
- {\r
- rk30_mux_api_set(GPIO4A2_FLASHDATA10_NAME,0);\r
- break; \r
- }\r
- \r
- case RK30_PIN4_PA3:\r
- {\r
- rk30_mux_api_set(GPIO4A3_FLASHDATA11_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN4_PA4:\r
- {\r
- rk30_mux_api_set(GPIO4A4_FLASHDATA12_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN4_PA5:\r
- {\r
- rk30_mux_api_set(GPIO4A5_FLASHDATA13_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN4_PA6:\r
- {\r
- rk30_mux_api_set(GPIO4A6_FLASHDATA14_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN4_PA7:\r
- {\r
- rk30_mux_api_set(GPIO4A7_FLASHDATA15_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN4_PB0:\r
- {\r
- rk30_mux_api_set(GPIO4B0_FLASHCSN1_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN4_PB1:\r
- {\r
- rk30_mux_api_set(GPIO4B1_FLASHCSN2_EMMCCMD_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN4_PB2:\r
- {\r
- rk30_mux_api_set(GPIO4B2_FLASHCSN3_EMMCRSTNOUT_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN4_PB3:\r
- {\r
- rk30_mux_api_set(GPIO4B3_FLASHCSN4_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN4_PB4:\r
- {\r
- rk30_mux_api_set(GPIO4B4_FLASHCSN5_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN4_PB5:\r
- {\r
- rk30_mux_api_set(GPIO4B5_FLASHCSN6_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN4_PB6:\r
- {\r
- rk30_mux_api_set(GPIO4B6_FLASHCSN7_NAME ,0);\r
- break; \r
- }\r
- case RK30_PIN4_PB7:\r
- {\r
- rk30_mux_api_set(GPIO4B7_SPI0CSN1_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN4_PC0:\r
- {\r
- rk30_mux_api_set(GPIO4C0_SMCDATA0_TRACEDATA0_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN4_PC1:\r
- {\r
- rk30_mux_api_set(GPIO4C1_SMCDATA1_TRACEDATA1_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN4_PC2:\r
- {\r
- rk30_mux_api_set(GPIO4C2_SMCDATA2_TRACEDATA2_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN4_PC3:\r
- {\r
- rk30_mux_api_set(GPIO4C3_SMCDATA3_TRACEDATA3_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN4_PC4:\r
- {\r
- rk30_mux_api_set(GPIO4C4_SMCDATA4_TRACEDATA4_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN4_PC5:\r
- {\r
- rk30_mux_api_set(GPIO4C5_SMCDATA5_TRACEDATA5_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN4_PC6:\r
- {\r
- rk30_mux_api_set(GPIO4C6_SMCDATA6_TRACEDATA6_NAME,0);\r
- break; \r
- }\r
-\r
-\r
- case RK30_PIN4_PC7:\r
- {\r
- rk30_mux_api_set(GPIO4C7_SMCDATA7_TRACEDATA7_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN4_PD0:\r
- {\r
- rk30_mux_api_set(GPIO4D0_SMCDATA8_TRACEDATA8_NAME,0); \r
- break; \r
- }\r
- case RK30_PIN4_PD1:\r
- {\r
- rk30_mux_api_set(GPIO4D1_SMCDATA9_TRACEDATA9_NAME,0); \r
- break; \r
- }\r
- case RK30_PIN4_PD2:\r
- {\r
- rk30_mux_api_set(GPIO4D2_SMCDATA10_TRACEDATA10_NAME,0); \r
- break; \r
- }\r
- case RK30_PIN4_PD3:\r
- {\r
- rk30_mux_api_set(GPIO4D3_SMCDATA11_TRACEDATA11_NAME,0); \r
- break; \r
- }\r
- case RK30_PIN4_PD4:\r
- {\r
- rk30_mux_api_set(GPIO4D4_SMCDATA12_TRACEDATA12_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN4_PD5:\r
- {\r
- rk30_mux_api_set(GPIO4D5_SMCDATA13_TRACEDATA13_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN4_PD6:\r
- {\r
- rk30_mux_api_set(GPIO4D6_SMCDATA14_TRACEDATA14_NAME,0);\r
- break; \r
- }\r
- case RK30_PIN4_PD7:\r
- {\r
- rk30_mux_api_set(GPIO4D7_SMCDATA15_TRACEDATA15_NAME,0);\r
- break; \r
- } \r
- case RK30_PIN6_PA0:\r
- case RK30_PIN6_PA1:\r
- case RK30_PIN6_PA2:\r
- case RK30_PIN6_PA3:\r
- case RK30_PIN6_PA4:\r
- case RK30_PIN6_PA5:\r
- case RK30_PIN6_PA6:\r
- case RK30_PIN6_PA7:\r
- case RK30_PIN6_PB0:\r
- case RK30_PIN6_PB1:\r
- case RK30_PIN6_PB2:\r
- case RK30_PIN6_PB3:\r
- case RK30_PIN6_PB4:\r
- case RK30_PIN6_PB5:\r
- case RK30_PIN6_PB6:\r
- break;\r
- case RK30_PIN6_PB7:\r
- {\r
- rk30_mux_api_set(GPIO6B7_TESTCLOCKOUT_NAME,0);\r
- break; \r
- } \r
- default:\r
- {\r
- printk("Pin=%d isn't RK GPIO, Please init it's iomux yourself!",pin);\r
- break;\r
- }\r
- }\r
- return 0;\r
-}\r
-#define PMEM_CAM_BASE 0 //just for compile ,no meaning\r
-#include "../../../arch/arm/plat-rk/rk_camera.c"\r
-\r
-\r
-\r
-static u64 rockchip_device_camera_dmamask = 0xffffffffUL;\r
-#if RK_SUPPORT_CIF0\r
-static struct resource rk_camera_resource_host_0[] = {\r
- [0] = {\r
- .start = RK30_CIF0_PHYS,\r
- .end = RK30_CIF0_PHYS + RK30_CIF0_SIZE - 1,\r
- .flags = IORESOURCE_MEM,\r
- },\r
- [1] = {\r
- .start = IRQ_CIF0,\r
- .end = IRQ_CIF0,\r
- .flags = IORESOURCE_IRQ,\r
- }\r
-};\r
-#endif\r
-#if RK_SUPPORT_CIF1\r
-static struct resource rk_camera_resource_host_1[] = {\r
- [0] = {\r
- .start = RK30_CIF1_PHYS,\r
- .end = RK30_CIF1_PHYS + RK30_CIF1_SIZE - 1,\r
- .flags = IORESOURCE_MEM,\r
- },\r
- [1] = {\r
- .start = IRQ_CIF1,\r
- .end = IRQ_CIF1,\r
- .flags = IORESOURCE_IRQ,\r
- }\r
-};\r
-#endif\r
-\r
-/*platform_device : */\r
-#if RK_SUPPORT_CIF0\r
- struct platform_device rk_device_camera_host_0 = {\r
- .name = RK29_CAM_DRV_NAME,\r
- .id = RK_CAM_PLATFORM_DEV_ID_0, /* This is used to put cameras on this interface */\r
- .num_resources = ARRAY_SIZE(rk_camera_resource_host_0),\r
- .resource = rk_camera_resource_host_0,\r
- .dev = {\r
- .dma_mask = &rockchip_device_camera_dmamask,\r
- .coherent_dma_mask = 0xffffffffUL,\r
- .platform_data = &rk_camera_platform_data,\r
- }\r
-};\r
-#endif\r
-\r
-#if RK_SUPPORT_CIF1\r
-/*platform_device : */\r
- struct platform_device rk_device_camera_host_1 = {\r
- .name = RK29_CAM_DRV_NAME,\r
- .id = RK_CAM_PLATFORM_DEV_ID_1, /* This is used to put cameras on this interface */\r
- .num_resources = ARRAY_SIZE(rk_camera_resource_host_1),\r
- .resource = rk_camera_resource_host_1,\r
- .dev = {\r
- .dma_mask = &rockchip_device_camera_dmamask,\r
- .coherent_dma_mask = 0xffffffffUL,\r
- .platform_data = &rk_camera_platform_data,\r
- }\r
-};\r
-#endif\r
-\r
-static void rk_init_camera_plateform_data(void)\r
-{\r
- int i,dev_idx;\r
- \r
- dev_idx = 0;\r
- for (i=0; i<RK_CAM_NUM; i++) {\r
- rk_camera_platform_data.sensor_init_data[i] = &rk_init_data_sensor[i];\r
- if (rk_camera_platform_data.register_dev[i].device_info.name) { \r
- rk_camera_platform_data.register_dev[i].link_info.board_info = \r
- &rk_camera_platform_data.register_dev[i].i2c_cam_info;\r
- rk_camera_platform_data.register_dev[i].device_info.id = dev_idx;\r
- rk_camera_platform_data.register_dev[i].device_info.dev.platform_data = \r
- &rk_camera_platform_data.register_dev[i].link_info;\r
- dev_idx++;\r
- }\r
- }\r
-}\r
-\r
-static void rk30_camera_request_reserve_mem(void)\r
-{\r
-#ifdef CONFIG_VIDEO_RK29_WORK_IPP \r
- #if defined(CONFIG_VIDEO_RKCIF_WORK_SIMUL_OFF) || ((RK_SUPPORT_CIF0 && RK_SUPPORT_CIF1) == false)\r
- rk_camera_platform_data.meminfo.name = "camera_ipp_mem";\r
- rk_camera_platform_data.meminfo.start = board_mem_reserve_add("camera_ipp_mem",PMEM_CAMIPP_NECESSARY);\r
- rk_camera_platform_data.meminfo.size= PMEM_CAMIPP_NECESSARY;\r
-\r
- memcpy(&rk_camera_platform_data.meminfo_cif1,&rk_camera_platform_data.meminfo,sizeof(struct rk29camera_mem_res));\r
- #else\r
- rk_camera_platform_data.meminfo.name = "camera_ipp_mem_0";\r
- rk_camera_platform_data.meminfo.start = board_mem_reserve_add("camera_ipp_mem_0",PMEM_CAMIPP_NECESSARY_CIF_0);\r
- rk_camera_platform_data.meminfo.size= PMEM_CAMIPP_NECESSARY_CIF_0;\r
- \r
- rk_camera_platform_data.meminfo_cif1.name = "camera_ipp_mem_1";\r
- rk_camera_platform_data.meminfo_cif1.start =board_mem_reserve_add("camera_ipp_mem_1",PMEM_CAMIPP_NECESSARY_CIF_1);\r
- rk_camera_platform_data.meminfo_cif1.size= PMEM_CAMIPP_NECESSARY_CIF_1;\r
- #endif\r
- #endif\r
- #if PMEM_CAM_NECESSARY\r
- android_pmem_cam_pdata.start = board_mem_reserve_add((char*)(android_pmem_cam_pdata.name),PMEM_CAM_NECESSARY);\r
- android_pmem_cam_pdata.size= PMEM_CAM_NECESSARY;\r
- #endif\r
-\r
-}\r
-static int rk_register_camera_devices(void)\r
-{\r
- int i;\r
- int host_registered_0,host_registered_1;\r
- \r
- rk_init_camera_plateform_data();\r
-\r
- host_registered_0 = 0;\r
- host_registered_1 = 0;\r
- for (i=0; i<RK_CAM_NUM; i++) {\r
- if (rk_camera_platform_data.register_dev[i].device_info.name) {\r
- \r
- if (rk_camera_platform_data.register_dev[i].link_info.bus_id == RK_CAM_PLATFORM_DEV_ID_0) {\r
- #if RK_SUPPORT_CIF0\r
- if (!host_registered_0) {\r
- platform_device_register(&rk_device_camera_host_0);\r
- host_registered_0 = 1;\r
- }\r
- #else\r
- printk(KERN_ERR "%s(%d) : This chip isn't support CIF0, Please user check ...\n",__FUNCTION__,__LINE__);\r
- #endif\r
- } \r
-\r
- if (rk_camera_platform_data.register_dev[i].link_info.bus_id == RK_CAM_PLATFORM_DEV_ID_1) {\r
- #if RK_SUPPORT_CIF1\r
- if (!host_registered_1) {\r
- platform_device_register(&rk_device_camera_host_1);\r
- host_registered_1 = 1;\r
- }\r
- #else\r
- printk(KERN_ERR "%s(%d) : This chip isn't support CIF1, Please user check ...\n",__FUNCTION__,__LINE__);\r
- #endif\r
- } \r
- }\r
- }\r
-\r
- for (i=0; i<RK_CAM_NUM; i++) {\r
- if (rk_camera_platform_data.register_dev[i].device_info.name) {\r
- platform_device_register(&rk_camera_platform_data.register_dev[i].device_info);\r
- }\r
- }\r
- #if PMEM_CAM_NECESSARY\r
- platform_device_register(&android_pmem_cam_device);\r
- #endif\r
- return 0;\r
-}\r
-\r
-module_init(rk_register_camera_devices);\r
-#endif\r
-\r
-#endif //#ifdef CONFIG_VIDEO_RK\r
+#include <media/soc_camera.h>
+#include <media/camsys_head.h>
+#include <linux/android_pmem.h>
+#include <linux/i2c.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include "../../../arch/arm/mach-rockchip/rk30_camera.h"/*yzm*/
+#include "../../../arch/arm/mach-rockchip/rk_camera.h"/*yzm*/
+//**********yzm***********//
+#include <linux/kernel.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/of_fdt.h>
+#include <linux/module.h>
+
+static int rk_register_camera_devices(void)
+{
+ int i;
+ int host_registered_0,host_registered_1;
+ struct rkcamera_platform_data *new_camera;
+
+ //printk(KERN_EMERG "/$$$$$$$$$$$$$$$$$$$$$$//n Here I am: %s:%i-------%s()\n", __FILE__, __LINE__,__FUNCTION__);
+
+ rk_cif_sensor_init();
+
+ host_registered_0 = 0;
+ host_registered_1 = 0;
+
+ i=0;
+ new_camera = rk_camera_platform_data.register_dev_new;
+ //new_camera = new_camera_head;
+
+ if (new_camera != NULL) {
+ while (new_camera != NULL) {
+ if (new_camera->dev.desc_info.host_desc.bus_id == RK_CAM_PLATFORM_DEV_ID_1) {/*yzm*/
+ host_registered_1 = 1;
+ } else if (new_camera->dev.desc_info.host_desc.bus_id == RK_CAM_PLATFORM_DEV_ID_0) {/*yzm*/
+ host_registered_0 = 1;
+ }
+
+ new_camera = new_camera->next_camera;
+ }
+ }
+
+ #if RK_SUPPORT_CIF0
+ if (host_registered_0) {
+ platform_device_register(&rk_device_camera_host_0);//host_0 has sensor
+ } //host_device_register
+ #endif
+
+ #if RK_SUPPORT_CIF1
+ if (host_registered_1) {
+ platform_device_register(&rk_device_camera_host_1);//host_1 has sensor
+ } //host_device_register
+ #endif
+
+
+ if (rk_camera_platform_data.sensor_register)
+ (rk_camera_platform_data.sensor_register)(); //call rk_sensor_register()
+
+ return 0;
+}
+
+
+module_init(rk_register_camera_devices);/*yzm*/
projects / firefly-linux-kernel-4.4.55.git / blobdiff