V4L/DVB (11343): au0828: make i2c clock speed per-board configurable
[firefly-linux-kernel-4.4.55.git] / drivers / media / video / au0828 / au0828-cards.c
index 1aabaa7e55bb0bb3f7930bc13ff6e831c4b73c41..abba48b154c59112ec6f521cd6f620d9a1a7d44e 100644 (file)
@@ -46,6 +46,7 @@ struct au0828_board au0828_boards[] = {
                .name   = "Hauppauge HVR850",
                .tuner_type = TUNER_XC5000,
                .tuner_addr = 0x61,
+               .i2c_clk_divider = AU0828_I2C_CLK_30KHZ,
                .input = {
                        {
                                .type = AU0828_VMUX_TELEVISION,
@@ -70,6 +71,13 @@ struct au0828_board au0828_boards[] = {
                .name   = "Hauppauge HVR950Q",
                .tuner_type = TUNER_XC5000,
                .tuner_addr = 0x61,
+               /* The au0828 hardware i2c implementation does not properly
+                  support the xc5000's i2c clock stretching.  So we need to
+                  lower the clock frequency enough where the 15us clock
+                  stretch fits inside of a normal clock cycle, or else the
+                  au0828 fails to set the STOP bit.  A 30 KHz clock puts the
+                  clock pulse width at 18us */
+               .i2c_clk_divider = AU0828_I2C_CLK_30KHZ,
                .input = {
                        {
                                .type = AU0828_VMUX_TELEVISION,
@@ -94,16 +102,19 @@ struct au0828_board au0828_boards[] = {
                .name   = "Hauppauge HVR950Q rev xxF8",
                .tuner_type = UNSET,
                .tuner_addr = ADDR_UNSET,
+               .i2c_clk_divider = AU0828_I2C_CLK_250KHZ,
        },
        [AU0828_BOARD_DVICO_FUSIONHDTV7] = {
                .name   = "DViCO FusionHDTV USB",
                .tuner_type = UNSET,
                .tuner_addr = ADDR_UNSET,
+               .i2c_clk_divider = AU0828_I2C_CLK_250KHZ,
        },
        [AU0828_BOARD_HAUPPAUGE_WOODBURY] = {
                .name = "Hauppauge Woodbury",
                .tuner_type = UNSET,
                .tuner_addr = ADDR_UNSET,
+               .i2c_clk_divider = AU0828_I2C_CLK_250KHZ,
        },
 };