Merge branches 'pm-opp', 'pm-cpufreq' and 'pm-tools'
[firefly-linux-kernel-4.4.55.git] / drivers / irqchip / irq-dw-apb-ictl.c
index c136b67740de85aabe7e806a0e7ce4bcf035da8d..53bb7326a60a6a597c159032627daa7d46d8ffe9 100644 (file)
@@ -50,6 +50,21 @@ static void dw_apb_ictl_handler(unsigned int irq, struct irq_desc *desc)
        chained_irq_exit(chip, desc);
 }
 
+#ifdef CONFIG_PM
+static void dw_apb_ictl_resume(struct irq_data *d)
+{
+       struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
+       struct irq_chip_type *ct = irq_data_get_chip_type(d);
+
+       irq_gc_lock(gc);
+       writel_relaxed(~0, gc->reg_base + ct->regs.enable);
+       writel_relaxed(*ct->mask_cache, gc->reg_base + ct->regs.mask);
+       irq_gc_unlock(gc);
+}
+#else
+#define dw_apb_ictl_resume     NULL
+#endif /* CONFIG_PM */
+
 static int __init dw_apb_ictl_init(struct device_node *np,
                                   struct device_node *parent)
 {
@@ -127,13 +142,17 @@ static int __init dw_apb_ictl_init(struct device_node *np,
        gc->reg_base = iobase;
 
        gc->chip_types[0].regs.mask = APB_INT_MASK_L;
+       gc->chip_types[0].regs.enable = APB_INT_ENABLE_L;
        gc->chip_types[0].chip.irq_mask = irq_gc_mask_set_bit;
        gc->chip_types[0].chip.irq_unmask = irq_gc_mask_clr_bit;
+       gc->chip_types[0].chip.irq_resume = dw_apb_ictl_resume;
 
        if (nrirqs > 32) {
                gc->chip_types[1].regs.mask = APB_INT_MASK_H;
+               gc->chip_types[1].regs.enable = APB_INT_ENABLE_H;
                gc->chip_types[1].chip.irq_mask = irq_gc_mask_set_bit;
                gc->chip_types[1].chip.irq_unmask = irq_gc_mask_clr_bit;
+               gc->chip_types[1].chip.irq_resume = dw_apb_ictl_resume;
        }
 
        irq_set_handler_data(irq, gc);