coresight: tmc: make sysFS and Perf mode mutually exclusive
[firefly-linux-kernel-4.4.55.git] / drivers / hwtracing / coresight / coresight-tmc-etf.c
index b5e5e6ac67ebbc0b3589f0b77cb5c201a3e3d64e..b11c52be54a9b1b03bcb455ddfbeb6fe65df0b88 100644 (file)
@@ -111,7 +111,7 @@ static void tmc_etf_disable_hw(struct tmc_drvdata *drvdata)
        CS_LOCK(drvdata->base);
 }
 
-static int tmc_enable_etf_sink(struct coresight_device *csdev, u32 mode)
+static int tmc_enable_etf_sink_sysfs(struct coresight_device *csdev, u32 mode)
 {
        int ret = 0;
        bool used = false;
@@ -185,6 +185,54 @@ out:
        return ret;
 }
 
+static int tmc_enable_etf_sink_perf(struct coresight_device *csdev, u32 mode)
+{
+       int ret = 0;
+       long val;
+       unsigned long flags;
+       struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+
+        /* This shouldn't be happening */
+       if (WARN_ON(mode != CS_MODE_PERF))
+               return -EINVAL;
+
+       spin_lock_irqsave(&drvdata->spinlock, flags);
+       if (drvdata->reading) {
+               ret = -EINVAL;
+               goto out;
+       }
+
+       val = local_xchg(&drvdata->mode, mode);
+       /*
+        * In Perf mode there can be only one writer per sink.  There
+        * is also no need to continue if the ETB/ETR is already operated
+        * from sysFS.
+        */
+       if (val != CS_MODE_DISABLED) {
+               ret = -EINVAL;
+               goto out;
+       }
+
+       tmc_etb_enable_hw(drvdata);
+out:
+       spin_unlock_irqrestore(&drvdata->spinlock, flags);
+
+       return ret;
+}
+
+static int tmc_enable_etf_sink(struct coresight_device *csdev, u32 mode)
+{
+       switch (mode) {
+       case CS_MODE_SYSFS:
+               return tmc_enable_etf_sink_sysfs(csdev, mode);
+       case CS_MODE_PERF:
+               return tmc_enable_etf_sink_perf(csdev, mode);
+       }
+
+       /* We shouldn't be here */
+       return -EINVAL;
+}
+
 static void tmc_disable_etf_sink(struct coresight_device *csdev)
 {
        long val;
@@ -267,6 +315,7 @@ const struct coresight_ops tmc_etf_cs_ops = {
 
 int tmc_read_prepare_etb(struct tmc_drvdata *drvdata)
 {
+       long val;
        enum tmc_mode mode;
        int ret = 0;
        unsigned long flags;
@@ -290,6 +339,13 @@ int tmc_read_prepare_etb(struct tmc_drvdata *drvdata)
                goto out;
        }
 
+       val = local_read(&drvdata->mode);
+       /* Don't interfere if operated from Perf */
+       if (val == CS_MODE_PERF) {
+               ret = -EINVAL;
+               goto out;
+       }
+
        /* If drvdata::buf is NULL the trace data has been read already */
        if (drvdata->buf == NULL) {
                ret = -EINVAL;
@@ -297,7 +353,7 @@ int tmc_read_prepare_etb(struct tmc_drvdata *drvdata)
        }
 
        /* Disable the TMC if need be */
-       if (local_read(&drvdata->mode) == CS_MODE_SYSFS)
+       if (val == CS_MODE_SYSFS)
                tmc_etb_disable_hw(drvdata);
 
        drvdata->reading = true;