drm/rockchip: add rk3399 vop big csc support

[firefly-linux-kernel-4.4.55.git] / drivers / gpu / drm / rockchip / dw-mipi-dsi.c

diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
index 69e8b35b6fab6721ac60e8c5a10356904ee445c4..f261dd97e130d0ee0a8ad285b4356b0e491b459d 100644 (file)
--- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
+++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
@@ -91,13 +91,16 @@
 #define FRAME_BTA_ACK                  BIT(14)
 #define ENABLE_LOW_POWER               (0x3f << 8)
 #define ENABLE_LOW_POWER_MASK          (0x3f << 8)
-#define VID_MODE_TYPE_BURST_SYNC_PULSES                0x2
-#define VID_MODE_TYPE_MASK                     0x3
+#define VID_MODE_TYPE_BURST_SYNC_PULSES        0x0
+#define VID_MODE_TYPE_BURST_SYNC_EVENTS        0x1
+#define VID_MODE_TYPE_BURST            0x2
 
 #define DSI_VID_PKT_SIZE               0x3c
 #define VID_PKT_SIZE(p)                        (((p) & 0x3fff) << 0)
 #define VID_PKT_MAX_SIZE               0x3fff
 
+#define DSI_VID_NUM_CHUMKS             0x40
+#define DSI_VID_NULL_PKT_SIZE          0x44
 #define DSI_VID_HSA_TIME               0x48
 #define DSI_VID_HBP_TIME               0x4c
 #define DSI_VID_HLINE_TIME             0x50
@@ -456,7 +459,7 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
                                         BANDGAP_SEL(BANDGAP_96_10));
 
        dw_mipi_dsi_phy_write(dsi, 0x70, TLP_PROGRAM_EN | 0xf);
-       dw_mipi_dsi_phy_write(dsi, 0x71, THS_PRE_PROGRAM_EN | 0x55);
+       dw_mipi_dsi_phy_write(dsi, 0x71, THS_PRE_PROGRAM_EN | 0x2d);
        dw_mipi_dsi_phy_write(dsi, 0x72, THS_ZERO_PROGRAM_EN | 0xa);
 
        dsi_write(dsi, DSI_PHY_RSTZ, PHY_ENFORCEPLL | PHY_ENABLECLK |
@@ -690,7 +693,7 @@ static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi)
 {
        u32 val;
 
-       val = VID_MODE_TYPE_BURST_SYNC_PULSES | ENABLE_LOW_POWER;
+       val = VID_MODE_TYPE_BURST | ENABLE_LOW_POWER;
 
        dsi_write(dsi, DSI_VID_MODE_CFG, val);
 }