Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm

[firefly-linux-kernel-4.4.55.git] / drivers / gpu / drm / radeon / radeon_vce.c

diff --git a/drivers/gpu/drm/radeon/radeon_vce.c b/drivers/gpu/drm/radeon/radeon_vce.c
index f46563b609219da1a24bbc7328125fc12508e35e..76e9904bc5377c23ea33c842137266ed18d560e8 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_vce.c
+++ b/drivers/gpu/drm/radeon/radeon_vce.c
@@ -34,11 +34,16 @@
 #include "radeon_asic.h"
 #include "sid.h"
 
+/* 1 second timeout */
+#define VCE_IDLE_TIMEOUT_MS    1000
+
 /* Firmware Names */
 #define FIRMWARE_BONAIRE       "radeon/BONAIRE_vce.bin"
 
 MODULE_FIRMWARE(FIRMWARE_BONAIRE);
 
+static void radeon_vce_idle_work_handler(struct work_struct *work);
+
 /**
  * radeon_vce_init - allocate memory, load vce firmware
  *
@@ -55,6 +60,8 @@ int radeon_vce_init(struct radeon_device *rdev)
        uint8_t start, mid, end;
        int i, r;
 
+       INIT_DELAYED_WORK(&rdev->vce.idle_work, radeon_vce_idle_work_handler);
+
        switch (rdev->family) {
        case CHIP_BONAIRE:
        case CHIP_KAVERI:
@@ -112,7 +119,7 @@ int radeon_vce_init(struct radeon_device *rdev)
        if (rdev->vce.fw_version != ((40 << 24) | (2 << 16) | (2 << 8)))
                return -EINVAL;
 
-       /* load firmware into VRAM */
+       /* allocate firmware, stack and heap BO */
 
        size = RADEON_GPU_PAGE_ALIGN(rdev->vce_fw->size) +
               RADEON_VCE_STACK_SIZE + RADEON_VCE_HEAP_SIZE;
@@ -123,16 +130,21 @@ int radeon_vce_init(struct radeon_device *rdev)
                return r;
        }
 
-       r = radeon_vce_resume(rdev);
-       if (r)
+       r = radeon_bo_reserve(rdev->vce.vcpu_bo, false);
+       if (r) {
+               radeon_bo_unref(&rdev->vce.vcpu_bo);
+               dev_err(rdev->dev, "(%d) failed to reserve VCE bo\n", r);
                return r;
+       }
 
-       memset(rdev->vce.cpu_addr, 0, size);
-       memcpy(rdev->vce.cpu_addr, rdev->vce_fw->data, rdev->vce_fw->size);
-
-       r = radeon_vce_suspend(rdev);
-       if (r)
+       r = radeon_bo_pin(rdev->vce.vcpu_bo, RADEON_GEM_DOMAIN_VRAM,
+                         &rdev->vce.gpu_addr);
+       radeon_bo_unreserve(rdev->vce.vcpu_bo);
+       if (r) {
+               radeon_bo_unref(&rdev->vce.vcpu_bo);
+               dev_err(rdev->dev, "(%d) VCE bo pin failed\n", r);
                return r;
+       }
 
        for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) {
                atomic_set(&rdev->vce.handles[i], 0);
@@ -151,8 +163,12 @@ int radeon_vce_init(struct radeon_device *rdev)
  */
 void radeon_vce_fini(struct radeon_device *rdev)
 {
-       radeon_vce_suspend(rdev);
+       if (rdev->vce.vcpu_bo == NULL)
+               return;
+
        radeon_bo_unref(&rdev->vce.vcpu_bo);
+
+       release_firmware(rdev->vce_fw);
 }
 
 /**
@@ -160,22 +176,23 @@ void radeon_vce_fini(struct radeon_device *rdev)
  *
  * @rdev: radeon_device pointer
  *
- * TODO: Test VCE suspend/resume
  */
 int radeon_vce_suspend(struct radeon_device *rdev)
 {
-       int r;
+       int i;
 
        if (rdev->vce.vcpu_bo == NULL)
                return 0;
 
-       r = radeon_bo_reserve(rdev->vce.vcpu_bo, false);
-       if (!r) {
-               radeon_bo_kunmap(rdev->vce.vcpu_bo);
-               radeon_bo_unpin(rdev->vce.vcpu_bo);
-               radeon_bo_unreserve(rdev->vce.vcpu_bo);
-       }
-       return r;
+       for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i)
+               if (atomic_read(&rdev->vce.handles[i]))
+                       break;
+
+       if (i == RADEON_MAX_VCE_HANDLES)
+               return 0;
+
+       /* TODO: suspending running encoding sessions isn't supported */
+       return -EINVAL;
 }
 
 /**
@@ -183,10 +200,10 @@ int radeon_vce_suspend(struct radeon_device *rdev)
  *
  * @rdev: radeon_device pointer
  *
- * TODO: Test VCE suspend/resume
  */
 int radeon_vce_resume(struct radeon_device *rdev)
 {
+       void *cpu_addr;
        int r;
 
        if (rdev->vce.vcpu_bo == NULL)
@@ -194,31 +211,79 @@ int radeon_vce_resume(struct radeon_device *rdev)
 
        r = radeon_bo_reserve(rdev->vce.vcpu_bo, false);
        if (r) {
-               radeon_bo_unref(&rdev->vce.vcpu_bo);
                dev_err(rdev->dev, "(%d) failed to reserve VCE bo\n", r);
                return r;
        }
 
-       r = radeon_bo_pin(rdev->vce.vcpu_bo, RADEON_GEM_DOMAIN_VRAM,
-                         &rdev->vce.gpu_addr);
+       r = radeon_bo_kmap(rdev->vce.vcpu_bo, &cpu_addr);
        if (r) {
                radeon_bo_unreserve(rdev->vce.vcpu_bo);
-               radeon_bo_unref(&rdev->vce.vcpu_bo);
-               dev_err(rdev->dev, "(%d) VCE bo pin failed\n", r);
-               return r;
-       }
-
-       r = radeon_bo_kmap(rdev->vce.vcpu_bo, &rdev->vce.cpu_addr);
-       if (r) {
                dev_err(rdev->dev, "(%d) VCE map failed\n", r);
                return r;
        }
 
+       memcpy(cpu_addr, rdev->vce_fw->data, rdev->vce_fw->size);
+
+       radeon_bo_kunmap(rdev->vce.vcpu_bo);
+
        radeon_bo_unreserve(rdev->vce.vcpu_bo);
 
        return 0;
 }
 
+/**
+ * radeon_vce_idle_work_handler - power off VCE
+ *
+ * @work: pointer to work structure
+ *
+ * power of VCE when it's not used any more
+ */
+static void radeon_vce_idle_work_handler(struct work_struct *work)
+{
+       struct radeon_device *rdev =
+               container_of(work, struct radeon_device, vce.idle_work.work);
+
+       if ((radeon_fence_count_emitted(rdev, TN_RING_TYPE_VCE1_INDEX) == 0) &&
+           (radeon_fence_count_emitted(rdev, TN_RING_TYPE_VCE2_INDEX) == 0)) {
+               if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) {
+                       radeon_dpm_enable_vce(rdev, false);
+               } else {
+                       radeon_set_vce_clocks(rdev, 0, 0);
+               }
+       } else {
+               schedule_delayed_work(&rdev->vce.idle_work,
+                                     msecs_to_jiffies(VCE_IDLE_TIMEOUT_MS));
+       }
+}
+
+/**
+ * radeon_vce_note_usage - power up VCE
+ *
+ * @rdev: radeon_device pointer
+ *
+ * Make sure VCE is powerd up when we want to use it
+ */
+void radeon_vce_note_usage(struct radeon_device *rdev)
+{
+       bool streams_changed = false;
+       bool set_clocks = !cancel_delayed_work_sync(&rdev->vce.idle_work);
+       set_clocks &= schedule_delayed_work(&rdev->vce.idle_work,
+                                           msecs_to_jiffies(VCE_IDLE_TIMEOUT_MS));
+
+       if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) {
+               /* XXX figure out if the streams changed */
+               streams_changed = false;
+       }
+
+       if (set_clocks || streams_changed) {
+               if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) {
+                       radeon_dpm_enable_vce(rdev, true);
+               } else {
+                       radeon_set_vce_clocks(rdev, 53300, 40000);
+               }
+       }
+}
+
 /**
  * radeon_vce_free_handles - free still open VCE handles
  *
@@ -235,6 +300,8 @@ void radeon_vce_free_handles(struct radeon_device *rdev, struct drm_file *filp)
                if (!handle || rdev->vce.filp[i] != filp)
                        continue;
 
+               radeon_vce_note_usage(rdev);
+
                r = radeon_vce_get_destroy_msg(rdev, TN_RING_TYPE_VCE1_INDEX,
                                               handle, NULL);
                if (r)
@@ -394,7 +461,7 @@ int radeon_vce_cs_reloc(struct radeon_cs_parser *p, int lo, int hi)
                return -EINVAL;
        }
 
-       offset += p->relocs_ptr[(idx / 4)]->lobj.gpu_offset;
+       offset += p->relocs_ptr[(idx / 4)]->gpu_offset;
 
         p->ib.ptr[lo] = offset & 0xFFFFFFFF;
         p->ib.ptr[hi] = offset >> 32;