drm/nouveau/fifo: audit and version fifo channel classes

[firefly-linux-kernel-4.4.55.git] / drivers / gpu / drm / nouveau / core / engine / fifo / nv17.c

diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nv17.c b/drivers/gpu/drm/nouveau/core/engine/fifo/nv17.c
index f257602093160a47d7a30acf12f230db0b4c668b..07b4b2d33bd2a7d4754819eba3f7fa0a32dfec2f 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/fifo/nv17.c
+++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nv17.c
@@ -22,8 +22,9 @@
  * Authors: Ben Skeggs
  */
 
-#include <core/os.h>
-#include <core/class.h>
+#include <core/client.h>
+#include <nvif/unpack.h>
+#include <nvif/class.h>
 #include <core/engctx.h>
 #include <core/ramht.h>
 
@@ -64,16 +65,23 @@ nv17_fifo_chan_ctor(struct nouveau_object *parent,
                    struct nouveau_oclass *oclass, void *data, u32 size,
                    struct nouveau_object **pobject)
 {
+       union {
+               struct nv03_channel_dma_v0 v0;
+       } *args = data;
        struct nv04_fifo_priv *priv = (void *)engine;
        struct nv04_fifo_chan *chan;
-       struct nv03_channel_dma_class *args = data;
        int ret;
 
-       if (size < sizeof(*args))
-               return -EINVAL;
+       nv_ioctl(parent, "create channel dma size %d\n", size);
+       if (nvif_unpack(args->v0, 0, 0, false)) {
+               nv_ioctl(parent, "create channel dma vers %d pushbuf %08x "
+                                "offset %016llx\n", args->v0.version,
+                        args->v0.pushbuf, args->v0.offset);
+       } else
+               return ret;
 
        ret = nouveau_fifo_channel_create(parent, engine, oclass, 0, 0x800000,
-                                         0x10000, args->pushbuf,
+                                         0x10000, args->v0.pushbuf,
                                          (1ULL << NVDEV_ENGINE_DMAOBJ) |
                                          (1ULL << NVDEV_ENGINE_SW) |
                                          (1ULL << NVDEV_ENGINE_GR) |
@@ -83,13 +91,15 @@ nv17_fifo_chan_ctor(struct nouveau_object *parent,
        if (ret)
                return ret;
 
+       args->v0.chid = chan->base.chid;
+
        nv_parent(chan)->object_attach = nv04_fifo_object_attach;
        nv_parent(chan)->object_detach = nv04_fifo_object_detach;
        nv_parent(chan)->context_attach = nv04_fifo_context_attach;
        chan->ramfc = chan->base.chid * 64;
 
-       nv_wo32(priv->ramfc, chan->ramfc + 0x00, args->offset);
-       nv_wo32(priv->ramfc, chan->ramfc + 0x04, args->offset);
+       nv_wo32(priv->ramfc, chan->ramfc + 0x00, args->v0.offset);
+       nv_wo32(priv->ramfc, chan->ramfc + 0x04, args->v0.offset);
        nv_wo32(priv->ramfc, chan->ramfc + 0x0c, chan->base.pushgpu->addr >> 4);
        nv_wo32(priv->ramfc, chan->ramfc + 0x14,
                             NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES |
@@ -113,7 +123,7 @@ nv17_fifo_ofuncs = {
 
 static struct nouveau_oclass
 nv17_fifo_sclass[] = {
-       { NV17_CHANNEL_DMA_CLASS, &nv17_fifo_ofuncs },
+       { NV17_CHANNEL_DMA, &nv17_fifo_ofuncs },
        {}
 };