drm/i915/skl: Allow scanning out Y and Yf fbs

[firefly-linux-kernel-4.4.55.git] / drivers / gpu / drm / i915 / intel_drv.h

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index a9c00bd5c8aba3dee89bd57c584e1b10265e316f..76df9d6fc205d1870d44a1c59a22f2c54ef3704d 100644 (file)
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -258,6 +258,7 @@ struct intel_plane_state {
 };
 
 struct intel_initial_plane_config {
+       struct intel_framebuffer *fb;
        unsigned int tiling;
        int size;
        u32 base;
@@ -592,6 +593,26 @@ struct intel_hdmi {
 struct intel_dp_mst_encoder;
 #define DP_MAX_DOWNSTREAM_PORTS                0x10
 
+/*
+ * enum link_m_n_set:
+ *     When platform provides two set of M_N registers for dp, we can
+ *     program them and switch between them incase of DRRS.
+ *     But When only one such register is provided, we have to program the
+ *     required divider value on that registers itself based on the DRRS state.
+ *
+ * M1_N1       : Program dp_m_n on M1_N1 registers
+ *                       dp_m2_n2 on M2_N2 registers (If supported)
+ *
+ * M2_N2       : Program dp_m2_n2 on M1_N1 registers
+ *                       M2_N2 registers are not supported
+ */
+
+enum link_m_n_set {
+       /* Sets the m1_n1 and m2_n2 */
+       M1_N1 = 0,
+       M2_N2
+};
+
 struct intel_dp {
        uint32_t output_reg;
        uint32_t aux_ch_ctl_reg;
@@ -710,7 +731,7 @@ intel_get_crtc_for_plane(struct drm_device *dev, int plane)
 struct intel_unpin_work {
        struct work_struct work;
        struct drm_crtc *crtc;
-       struct drm_i915_gem_object *old_fb_obj;
+       struct drm_framebuffer *old_fb;
        struct drm_i915_gem_object *pending_flip_obj;
        struct drm_pending_vblank_event *event;
        atomic_t pending;
@@ -878,9 +899,12 @@ void intel_frontbuffer_flip(struct drm_device *dev,
 }
 
 int intel_fb_align_height(struct drm_device *dev, int height,
-                         unsigned int tiling);
+                         uint32_t pixel_format,
+                         uint64_t fb_format_modifier);
 void intel_fb_obj_flush(struct drm_i915_gem_object *obj, bool retire);
 
+u32 intel_fb_stride_alignment(struct drm_device *dev, uint64_t fb_modifier,
+                             uint32_t pixel_format);
 
 /* intel_audio.c */
 void intel_init_audio(struct drm_device *dev);
@@ -890,6 +914,7 @@ void i915_audio_component_init(struct drm_i915_private *dev_priv);
 void i915_audio_component_cleanup(struct drm_i915_private *dev_priv);
 
 /* intel_display.c */
+extern const struct drm_plane_funcs intel_plane_funcs;
 bool intel_has_pending_fb_unpin(struct drm_device *dev);
 int intel_pch_rawclk(struct drm_device *dev);
 void intel_mark_busy(struct drm_device *dev);
@@ -931,7 +956,6 @@ void intel_release_load_detect_pipe(struct drm_connector *connector,
 int intel_pin_and_fence_fb_obj(struct drm_plane *plane,
                               struct drm_framebuffer *fb,
                               struct intel_engine_cs *pipelined);
-void intel_unpin_fb_obj(struct drm_i915_gem_object *obj);
 struct drm_framebuffer *
 __intel_framebuffer_create(struct drm_device *dev,
                           struct drm_mode_fb_cmd2 *mode_cmd,
@@ -944,6 +968,14 @@ int intel_prepare_plane_fb(struct drm_plane *plane,
                           struct drm_framebuffer *fb);
 void intel_cleanup_plane_fb(struct drm_plane *plane,
                            struct drm_framebuffer *fb);
+int intel_plane_atomic_get_property(struct drm_plane *plane,
+                                   const struct drm_plane_state *state,
+                                   struct drm_property *property,
+                                   uint64_t *val);
+int intel_plane_atomic_set_property(struct drm_plane *plane,
+                                   struct drm_plane_state *state,
+                                   struct drm_property *property,
+                                   uint64_t val);
 
 /* shared dpll functions */
 struct intel_shared_dpll *intel_crtc_to_shared_dpll(struct intel_crtc *crtc);
@@ -984,7 +1016,7 @@ void hsw_enable_pc8(struct drm_i915_private *dev_priv);
 void hsw_disable_pc8(struct drm_i915_private *dev_priv);
 void intel_dp_get_m_n(struct intel_crtc *crtc,
                      struct intel_crtc_state *pipe_config);
-void intel_dp_set_m_n(struct intel_crtc *crtc);
+void intel_dp_set_m_n(struct intel_crtc *crtc, enum link_m_n_set m_n);
 int intel_dotclock_calculate(int link_freq, const struct intel_link_m_n *m_n);
 void
 ironlake_check_encoder_dotclock(const struct intel_crtc_state *pipe_config,
@@ -1008,7 +1040,6 @@ void intel_dp_complete_link_train(struct intel_dp *intel_dp);
 void intel_dp_stop_link_train(struct intel_dp *intel_dp);
 void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode);
 void intel_dp_encoder_destroy(struct drm_encoder *encoder);
-void intel_dp_check_link_status(struct intel_dp *intel_dp);
 int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc);
 bool intel_dp_compute_config(struct intel_encoder *encoder,
                             struct intel_crtc_state *pipe_config);
@@ -1027,13 +1058,6 @@ int intel_dp_max_link_bw(struct intel_dp *intel_dp);
 void intel_dp_hot_plug(struct intel_encoder *intel_encoder);
 void vlv_power_sequencer_reset(struct drm_i915_private *dev_priv);
 uint32_t intel_dp_pack_aux(const uint8_t *src, int src_bytes);
-void intel_dp_unpack_aux(uint32_t src, uint8_t *dst, int dst_bytes);
-int intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
-                      struct drm_framebuffer *fb, int crtc_x, int crtc_y,
-                      unsigned int crtc_w, unsigned int crtc_h,
-                      uint32_t src_x, uint32_t src_y,
-                      uint32_t src_w, uint32_t src_h);
-int intel_disable_plane(struct drm_plane *plane);
 void intel_plane_destroy(struct drm_plane *plane);
 void intel_edp_drrs_enable(struct intel_dp *intel_dp);
 void intel_edp_drrs_disable(struct intel_dp *intel_dp);
@@ -1222,9 +1246,6 @@ bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob);
 int intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane);
 void intel_flush_primary_plane(struct drm_i915_private *dev_priv,
                               enum plane plane);
-int intel_plane_set_property(struct drm_plane *plane,
-                            struct drm_property *prop,
-                            uint64_t val);
 int intel_plane_restore(struct drm_plane *plane);
 int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
                              struct drm_file *file_priv);
@@ -1240,6 +1261,20 @@ void intel_pre_disable_primary(struct drm_crtc *crtc);
 void intel_tv_init(struct drm_device *dev);
 
 /* intel_atomic.c */
+int intel_atomic_check(struct drm_device *dev,
+                      struct drm_atomic_state *state);
+int intel_atomic_commit(struct drm_device *dev,
+                       struct drm_atomic_state *state,
+                       bool async);
+int intel_connector_atomic_get_property(struct drm_connector *connector,
+                                       const struct drm_connector_state *state,
+                                       struct drm_property *property,
+                                       uint64_t *val);
+struct drm_crtc_state *intel_crtc_duplicate_state(struct drm_crtc *crtc);
+void intel_crtc_destroy_state(struct drm_crtc *crtc,
+                              struct drm_crtc_state *state);
+
+/* intel_atomic_plane.c */
 struct intel_plane_state *intel_create_plane_state(struct drm_plane *plane);
 struct drm_plane_state *intel_plane_duplicate_state(struct drm_plane *plane);
 void intel_plane_destroy_state(struct drm_plane *plane,