MALI: rockchip: upgrade midgard DDK to r11p0-00rel0

[firefly-linux-kernel-4.4.55.git] / drivers / gpu / arm / midgard / mali_base_hwconfig_issues.h

diff --git a/drivers/gpu/arm/midgard/mali_base_hwconfig_issues.h b/drivers/gpu/arm/midgard/mali_base_hwconfig_issues.h
index 66c2dc76fdb3661d5879b5bddcf23d5d18c9deff..e111b0777f1f46b3dc003589904f9679e10bfcdf 100644 (file)
--- a/drivers/gpu/arm/midgard/mali_base_hwconfig_issues.h
+++ b/drivers/gpu/arm/midgard/mali_base_hwconfig_issues.h
@@ -1,6 +1,6 @@
 /*
  *
- * (C) COPYRIGHT 2015 ARM Limited. All rights reserved.
+ * (C) COPYRIGHT 2015-2016 ARM Limited. All rights reserved.
  *
  * This program is free software and is provided to you under the terms of the
  * GNU General Public License version 2 as published by the Free Software
@@ -100,7 +100,14 @@ enum base_hw_issue {
        BASE_HW_ISSUE_T76X_3793,
        BASE_HW_ISSUE_T76X_3953,
        BASE_HW_ISSUE_T76X_3960,
+       BASE_HW_ISSUE_T76X_3964,
        BASE_HW_ISSUE_T76X_3966,
+       BASE_HW_ISSUE_TMIX_7891,
+       BASE_HW_ISSUE_TMIX_7940,
+       BASE_HW_ISSUE_TMIX_8042,
+       BASE_HW_ISSUE_TMIX_8133,
+       BASE_HW_ISSUE_TMIX_8138,
+       BASE_HW_ISSUE_TMIX_8206,
        GPUCORE_1619,
        BASE_HW_ISSUE_END
 };
@@ -167,6 +174,7 @@ static const enum base_hw_issue base_hw_issues_t60x_r0p0_15dev0[] = {
        BASE_HW_ISSUE_11035,
        BASE_HW_ISSUE_11051,
        BASE_HW_ISSUE_T76X_1909,
+       BASE_HW_ISSUE_T76X_3964,
        GPUCORE_1619,
        BASE_HW_ISSUE_END
 };
@@ -204,6 +212,7 @@ static const enum base_hw_issue base_hw_issues_t60x_r0p0_eac[] = {
        BASE_HW_ISSUE_11035,
        BASE_HW_ISSUE_11051,
        BASE_HW_ISSUE_T76X_1909,
+       BASE_HW_ISSUE_T76X_3964,
        BASE_HW_ISSUE_END
 };
 
@@ -238,6 +247,7 @@ static const enum base_hw_issue base_hw_issues_t60x_r0p1[] = {
        BASE_HW_ISSUE_11051,
        BASE_HW_ISSUE_T76X_1909,
        BASE_HW_ISSUE_T76X_1963,
+       BASE_HW_ISSUE_T76X_3964,
        BASE_HW_ISSUE_END
 };
 
@@ -290,6 +300,7 @@ static const enum base_hw_issue base_hw_issues_t62x_r1p0[] = {
        BASE_HW_ISSUE_11051,
        BASE_HW_ISSUE_T76X_1909,
        BASE_HW_ISSUE_T76X_1963,
+       BASE_HW_ISSUE_T76X_3964,
        BASE_HW_ISSUE_END
 };
 
@@ -331,7 +342,9 @@ static const enum base_hw_issue base_hw_issues_t76x_r0p0[] = {
        BASE_HW_ISSUE_T76X_3793,
        BASE_HW_ISSUE_T76X_3953,
        BASE_HW_ISSUE_T76X_3960,
+       BASE_HW_ISSUE_T76X_3964,
        BASE_HW_ISSUE_T76X_3966,
+       BASE_HW_ISSUE_TMIX_7891,
        BASE_HW_ISSUE_END
 };
 
@@ -354,7 +367,9 @@ static const enum base_hw_issue base_hw_issues_t76x_r0p1[] = {
        BASE_HW_ISSUE_T76X_3793,
        BASE_HW_ISSUE_T76X_3953,
        BASE_HW_ISSUE_T76X_3960,
+       BASE_HW_ISSUE_T76X_3964,
        BASE_HW_ISSUE_T76X_3966,
+       BASE_HW_ISSUE_TMIX_7891,
        BASE_HW_ISSUE_END
 };
 
@@ -375,7 +390,9 @@ static const enum base_hw_issue base_hw_issues_t76x_r0p1_50rel0[] = {
        BASE_HW_ISSUE_T76X_3793,
        BASE_HW_ISSUE_T76X_3953,
        BASE_HW_ISSUE_T76X_3960,
+       BASE_HW_ISSUE_T76X_3964,
        BASE_HW_ISSUE_T76X_3966,
+       BASE_HW_ISSUE_TMIX_7891,
        BASE_HW_ISSUE_END
 };
 
@@ -398,7 +415,9 @@ static const enum base_hw_issue base_hw_issues_t76x_r0p2[] = {
        BASE_HW_ISSUE_T76X_3793,
        BASE_HW_ISSUE_T76X_3953,
        BASE_HW_ISSUE_T76X_3960,
+       BASE_HW_ISSUE_T76X_3964,
        BASE_HW_ISSUE_T76X_3966,
+       BASE_HW_ISSUE_TMIX_7891,
        BASE_HW_ISSUE_END
 };
 
@@ -419,7 +438,9 @@ static const enum base_hw_issue base_hw_issues_t76x_r0p3[] = {
        BASE_HW_ISSUE_T76X_3793,
        BASE_HW_ISSUE_T76X_3953,
        BASE_HW_ISSUE_T76X_3960,
+       BASE_HW_ISSUE_T76X_3964,
        BASE_HW_ISSUE_T76X_3966,
+       BASE_HW_ISSUE_TMIX_7891,
        BASE_HW_ISSUE_END
 };
 
@@ -437,7 +458,9 @@ static const enum base_hw_issue base_hw_issues_t76x_r1p0[] = {
        BASE_HW_ISSUE_T76X_3793,
        BASE_HW_ISSUE_T76X_3953,
        BASE_HW_ISSUE_T76X_3960,
+       BASE_HW_ISSUE_T76X_3964,
        BASE_HW_ISSUE_T76X_3966,
+       BASE_HW_ISSUE_TMIX_7891,
        BASE_HW_ISSUE_END
 };
 
@@ -454,6 +477,7 @@ static const enum base_hw_issue base_hw_issues_t72x_r0p0[] = {
        BASE_HW_ISSUE_11051,
        BASE_HW_ISSUE_T76X_1909,
        BASE_HW_ISSUE_T76X_1963,
+       BASE_HW_ISSUE_T76X_3964,
        BASE_HW_ISSUE_END
 };
 
@@ -470,6 +494,7 @@ static const enum base_hw_issue base_hw_issues_t72x_r1p0[] = {
        BASE_HW_ISSUE_11051,
        BASE_HW_ISSUE_T76X_1909,
        BASE_HW_ISSUE_T76X_1963,
+       BASE_HW_ISSUE_T76X_3964,
        BASE_HW_ISSUE_END
 };
 
@@ -486,6 +511,7 @@ static const enum base_hw_issue base_hw_issues_t72x_r1p1[] = {
        BASE_HW_ISSUE_11051,
        BASE_HW_ISSUE_T76X_1909,
        BASE_HW_ISSUE_T76X_1963,
+       BASE_HW_ISSUE_T76X_3964,
        BASE_HW_ISSUE_END
 };
 
@@ -499,6 +525,7 @@ static const enum base_hw_issue base_hw_issues_model_t72x[] = {
        BASE_HW_ISSUE_11051,
        BASE_HW_ISSUE_T76X_1909,
        BASE_HW_ISSUE_T76X_1963,
+       BASE_HW_ISSUE_T76X_3964,
        GPUCORE_1619,
        BASE_HW_ISSUE_END
 };
@@ -515,6 +542,8 @@ static const enum base_hw_issue base_hw_issues_model_t76x[] = {
        BASE_HW_ISSUE_T76X_3086,
        BASE_HW_ISSUE_T76X_3700,
        BASE_HW_ISSUE_T76X_3793,
+       BASE_HW_ISSUE_T76X_3964,
+       BASE_HW_ISSUE_TMIX_7891,
        GPUCORE_1619,
        BASE_HW_ISSUE_END
 };
@@ -532,6 +561,7 @@ static const enum base_hw_issue base_hw_issues_model_t60x[] = {
        BASE_HW_ISSUE_11051,
        BASE_HW_ISSUE_T76X_1909,
        BASE_HW_ISSUE_T76X_1963,
+       BASE_HW_ISSUE_T76X_3964,
        GPUCORE_1619,
        BASE_HW_ISSUE_END
 };
@@ -549,6 +579,7 @@ static const enum base_hw_issue base_hw_issues_model_t62x[] = {
        BASE_HW_ISSUE_11051,
        BASE_HW_ISSUE_T76X_1909,
        BASE_HW_ISSUE_T76X_1963,
+       BASE_HW_ISSUE_T76X_3964,
        GPUCORE_1619,
        BASE_HW_ISSUE_END
 };
@@ -566,7 +597,9 @@ static const enum base_hw_issue base_hw_issues_tFRx_r0p1[] = {
        BASE_HW_ISSUE_T76X_3793,
        BASE_HW_ISSUE_T76X_3953,
        BASE_HW_ISSUE_T76X_3960,
+       BASE_HW_ISSUE_T76X_3964,
        BASE_HW_ISSUE_T76X_3966,
+       BASE_HW_ISSUE_TMIX_7891,
        BASE_HW_ISSUE_END
 };
 
@@ -582,7 +615,9 @@ static const enum base_hw_issue base_hw_issues_tFRx_r0p2[] = {
        BASE_HW_ISSUE_T76X_3700,
        BASE_HW_ISSUE_T76X_3793,
        BASE_HW_ISSUE_T76X_3953,
+       BASE_HW_ISSUE_T76X_3964,
        BASE_HW_ISSUE_T76X_3966,
+       BASE_HW_ISSUE_TMIX_7891,
        BASE_HW_ISSUE_END
 };
 
@@ -598,6 +633,7 @@ static const enum base_hw_issue base_hw_issues_tFRx_r1p0[] = {
        BASE_HW_ISSUE_T76X_3793,
        BASE_HW_ISSUE_T76X_3953,
        BASE_HW_ISSUE_T76X_3966,
+       BASE_HW_ISSUE_TMIX_7891,
        BASE_HW_ISSUE_END
 };
 
@@ -613,6 +649,7 @@ static const enum base_hw_issue base_hw_issues_tFRx_r2p0[] = {
        BASE_HW_ISSUE_T76X_3793,
        BASE_HW_ISSUE_T76X_3953,
        BASE_HW_ISSUE_T76X_3966,
+       BASE_HW_ISSUE_TMIX_7891,
        BASE_HW_ISSUE_END
 };
 
@@ -624,6 +661,8 @@ static const enum base_hw_issue base_hw_issues_model_tFRx[] = {
        BASE_HW_ISSUE_T76X_3086,
        BASE_HW_ISSUE_T76X_3700,
        BASE_HW_ISSUE_T76X_3793,
+       BASE_HW_ISSUE_T76X_3964,
+       BASE_HW_ISSUE_TMIX_7891,
        GPUCORE_1619,
        BASE_HW_ISSUE_END
 };
@@ -640,7 +679,9 @@ static const enum base_hw_issue base_hw_issues_t86x_r0p2[] = {
        BASE_HW_ISSUE_T76X_3700,
        BASE_HW_ISSUE_T76X_3793,
        BASE_HW_ISSUE_T76X_3953,
+       BASE_HW_ISSUE_T76X_3964,
        BASE_HW_ISSUE_T76X_3966,
+       BASE_HW_ISSUE_TMIX_7891,
        BASE_HW_ISSUE_END
 };
 
@@ -656,6 +697,7 @@ static const enum base_hw_issue base_hw_issues_t86x_r1p0[] = {
        BASE_HW_ISSUE_T76X_3793,
        BASE_HW_ISSUE_T76X_3953,
        BASE_HW_ISSUE_T76X_3966,
+       BASE_HW_ISSUE_TMIX_7891,
        BASE_HW_ISSUE_END
 };
 
@@ -671,6 +713,7 @@ static const enum base_hw_issue base_hw_issues_t86x_r2p0[] = {
        BASE_HW_ISSUE_T76X_3793,
        BASE_HW_ISSUE_T76X_3953,
        BASE_HW_ISSUE_T76X_3966,
+       BASE_HW_ISSUE_TMIX_7891,
        BASE_HW_ISSUE_END
 };
 
@@ -682,6 +725,7 @@ static const enum base_hw_issue base_hw_issues_model_t86x[] = {
        BASE_HW_ISSUE_T76X_3086,
        BASE_HW_ISSUE_T76X_3700,
        BASE_HW_ISSUE_T76X_3793,
+       BASE_HW_ISSUE_TMIX_7891,
        GPUCORE_1619,
        BASE_HW_ISSUE_END
 };
@@ -699,6 +743,7 @@ static const enum base_hw_issue base_hw_issues_t83x_r0p1[] = {
        BASE_HW_ISSUE_T76X_3793,
        BASE_HW_ISSUE_T76X_3953,
        BASE_HW_ISSUE_T76X_3960,
+       BASE_HW_ISSUE_TMIX_7891,
        BASE_HW_ISSUE_END
 };
 
@@ -714,6 +759,7 @@ static const enum base_hw_issue base_hw_issues_t83x_r1p0[] = {
        BASE_HW_ISSUE_T76X_3793,
        BASE_HW_ISSUE_T76X_3953,
        BASE_HW_ISSUE_T76X_3960,
+       BASE_HW_ISSUE_TMIX_7891,
        BASE_HW_ISSUE_END
 };
 
@@ -726,6 +772,8 @@ static const enum base_hw_issue base_hw_issues_model_t83x[] = {
        BASE_HW_ISSUE_T76X_3086,
        BASE_HW_ISSUE_T76X_3700,
        BASE_HW_ISSUE_T76X_3793,
+       BASE_HW_ISSUE_T76X_3964,
+       BASE_HW_ISSUE_TMIX_7891,
        GPUCORE_1619,
        BASE_HW_ISSUE_END
 };
@@ -743,6 +791,8 @@ static const enum base_hw_issue base_hw_issues_t82x_r0p0[] = {
        BASE_HW_ISSUE_T76X_3793,
        BASE_HW_ISSUE_T76X_3953,
        BASE_HW_ISSUE_T76X_3960,
+       BASE_HW_ISSUE_T76X_3964,
+       BASE_HW_ISSUE_TMIX_7891,
        BASE_HW_ISSUE_END
 };
 
@@ -759,6 +809,7 @@ static const enum base_hw_issue base_hw_issues_t82x_r0p1[] = {
        BASE_HW_ISSUE_T76X_3793,
        BASE_HW_ISSUE_T76X_3953,
        BASE_HW_ISSUE_T76X_3960,
+       BASE_HW_ISSUE_TMIX_7891,
        BASE_HW_ISSUE_END
 };
 
@@ -774,6 +825,7 @@ static const enum base_hw_issue base_hw_issues_t82x_r1p0[] = {
        BASE_HW_ISSUE_T76X_3793,
        BASE_HW_ISSUE_T76X_3953,
        BASE_HW_ISSUE_T76X_3960,
+       BASE_HW_ISSUE_TMIX_7891,
        BASE_HW_ISSUE_END
 };
 
@@ -786,10 +838,50 @@ static const enum base_hw_issue base_hw_issues_model_t82x[] = {
        BASE_HW_ISSUE_T76X_3086,
        BASE_HW_ISSUE_T76X_3700,
        BASE_HW_ISSUE_T76X_3793,
+       BASE_HW_ISSUE_TMIX_7891,
        GPUCORE_1619,
        BASE_HW_ISSUE_END
 };
 
+static const enum base_hw_issue base_hw_issues_tMIx_r0p0_05dev0[] = {
+       BASE_HW_ISSUE_9435,
+       BASE_HW_ISSUE_10682,
+       BASE_HW_ISSUE_10821,
+       BASE_HW_ISSUE_T76X_3700,
+       BASE_HW_ISSUE_T76X_3953,
+       BASE_HW_ISSUE_TMIX_7891,
+       BASE_HW_ISSUE_TMIX_8042,
+       BASE_HW_ISSUE_TMIX_8133,
+       BASE_HW_ISSUE_TMIX_8138,
+       BASE_HW_ISSUE_END
+};
+
+static const enum base_hw_issue base_hw_issues_tMIx_r0p0[] = {
+       BASE_HW_ISSUE_9435,
+       BASE_HW_ISSUE_10682,
+       BASE_HW_ISSUE_10821,
+       BASE_HW_ISSUE_T76X_3700,
+       BASE_HW_ISSUE_TMIX_7891,
+       BASE_HW_ISSUE_TMIX_7940,
+       BASE_HW_ISSUE_TMIX_8042,
+       BASE_HW_ISSUE_TMIX_8133,
+       BASE_HW_ISSUE_TMIX_8138,
+       BASE_HW_ISSUE_TMIX_8206,
+       BASE_HW_ISSUE_END
+};
 
+static const enum base_hw_issue base_hw_issues_model_tMIx[] = {
+       BASE_HW_ISSUE_5736,
+       BASE_HW_ISSUE_9435,
+       BASE_HW_ISSUE_T76X_3700,
+       BASE_HW_ISSUE_TMIX_7891,
+       BASE_HW_ISSUE_TMIX_7940,
+       BASE_HW_ISSUE_TMIX_8042,
+       BASE_HW_ISSUE_TMIX_8133,
+       BASE_HW_ISSUE_TMIX_8138,
+       BASE_HW_ISSUE_TMIX_8206,
+       GPUCORE_1619,
+       BASE_HW_ISSUE_END
+};
 
 #endif /* _BASE_HWCONFIG_ISSUES_H_ */