MALI: rockchip: upgrade midgard DDK to r14p0-01rel0

[firefly-linux-kernel-4.4.55.git] / drivers / gpu / arm / midgard / mali_base_hwconfig_features.h

diff --git a/drivers/gpu/arm/midgard/mali_base_hwconfig_features.h b/drivers/gpu/arm/midgard/mali_base_hwconfig_features.h
index bec9a5acf5c32b02e7cd1b610f1269bf72c0f8e3..8b07cbc5eae868722d267b8e9f02d608fe6abe1c 100644 (file)
--- a/drivers/gpu/arm/midgard/mali_base_hwconfig_features.h
+++ b/drivers/gpu/arm/midgard/mali_base_hwconfig_features.h
@@ -1,6 +1,6 @@
 /*
  *
- * (C) COPYRIGHT 2015 ARM Limited. All rights reserved.
+ * (C) COPYRIGHT 2015-2016 ARM Limited. All rights reserved.
  *
  * This program is free software and is provided to you under the terms of the
  * GNU General Public License version 2 as published by the Free Software
@@ -27,6 +27,7 @@ enum base_hw_feature {
        BASE_HW_FEATURE_JOBCHAIN_DISAMBIGUATION,
        BASE_HW_FEATURE_PWRON_DURING_PWROFF_TRANS,
        BASE_HW_FEATURE_33BIT_VA,
+       BASE_HW_FEATURE_XAFFINITY,
        BASE_HW_FEATURE_OUT_OF_ORDER_EXEC,
        BASE_HW_FEATURE_MRT,
        BASE_HW_FEATURE_BRNDOUT_CC,
@@ -45,8 +46,11 @@ enum base_hw_feature {
        BASE_HW_FEATURE_NEXT_INSTRUCTION_TYPE,
        BASE_HW_FEATURE_BRNDOUT_KILL,
        BASE_HW_FEATURE_WARPING,
-       BASE_HW_FEATURE_FLUSH_REDUCTION,
        BASE_HW_FEATURE_V4,
+       BASE_HW_FEATURE_FLUSH_REDUCTION,
+       BASE_HW_FEATURE_PROTECTED_MODE,
+       BASE_HW_FEATURE_COHERENCY_REG,
+       BASE_HW_FEATURE_PROTECTED_DEBUG_MODE,
        BASE_HW_FEATURE_END
 };
 
@@ -85,6 +89,7 @@ static const enum base_hw_feature base_hw_features_t72x[] = {
 static const enum base_hw_feature base_hw_features_t76x[] = {
        BASE_HW_FEATURE_JOBCHAIN_DISAMBIGUATION,
        BASE_HW_FEATURE_PWRON_DURING_PWROFF_TRANS,
+       BASE_HW_FEATURE_XAFFINITY,
        BASE_HW_FEATURE_32_BIT_UNIFORM_ADDRESS,
        BASE_HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL,
        BASE_HW_FEATURE_BRNDOUT_CC,
@@ -102,6 +107,7 @@ static const enum base_hw_feature base_hw_features_t76x[] = {
 static const enum base_hw_feature base_hw_features_tFxx[] = {
        BASE_HW_FEATURE_JOBCHAIN_DISAMBIGUATION,
        BASE_HW_FEATURE_PWRON_DURING_PWROFF_TRANS,
+       BASE_HW_FEATURE_XAFFINITY,
        BASE_HW_FEATURE_32_BIT_UNIFORM_ADDRESS,
        BASE_HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL,
        BASE_HW_FEATURE_BRNDOUT_CC,
@@ -122,6 +128,7 @@ static const enum base_hw_feature base_hw_features_t83x[] = {
        BASE_HW_FEATURE_33BIT_VA,
        BASE_HW_FEATURE_JOBCHAIN_DISAMBIGUATION,
        BASE_HW_FEATURE_PWRON_DURING_PWROFF_TRANS,
+       BASE_HW_FEATURE_XAFFINITY,
        BASE_HW_FEATURE_WARPING,
        BASE_HW_FEATURE_INTERPIPE_REG_ALIASING,
        BASE_HW_FEATURE_32_BIT_UNIFORM_ADDRESS,
@@ -143,6 +150,7 @@ static const enum base_hw_feature base_hw_features_t82x[] = {
        BASE_HW_FEATURE_33BIT_VA,
        BASE_HW_FEATURE_JOBCHAIN_DISAMBIGUATION,
        BASE_HW_FEATURE_PWRON_DURING_PWROFF_TRANS,
+       BASE_HW_FEATURE_XAFFINITY,
        BASE_HW_FEATURE_WARPING,
        BASE_HW_FEATURE_INTERPIPE_REG_ALIASING,
        BASE_HW_FEATURE_32_BIT_UNIFORM_ADDRESS,
@@ -160,4 +168,56 @@ static const enum base_hw_feature base_hw_features_t82x[] = {
        BASE_HW_FEATURE_END
 };
 
+static const enum base_hw_feature base_hw_features_tMIx[] = {
+       BASE_HW_FEATURE_JOBCHAIN_DISAMBIGUATION,
+       BASE_HW_FEATURE_PWRON_DURING_PWROFF_TRANS,
+       BASE_HW_FEATURE_XAFFINITY,
+       BASE_HW_FEATURE_WARPING,
+       BASE_HW_FEATURE_INTERPIPE_REG_ALIASING,
+       BASE_HW_FEATURE_32_BIT_UNIFORM_ADDRESS,
+       BASE_HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL,
+       BASE_HW_FEATURE_BRNDOUT_CC,
+       BASE_HW_FEATURE_BRNDOUT_KILL,
+       BASE_HW_FEATURE_LD_ST_LEA_TEX,
+       BASE_HW_FEATURE_LD_ST_TILEBUFFER,
+       BASE_HW_FEATURE_LINEAR_FILTER_FLOAT,
+       BASE_HW_FEATURE_MRT,
+       BASE_HW_FEATURE_MSAA_16X,
+       BASE_HW_FEATURE_NEXT_INSTRUCTION_TYPE,
+       BASE_HW_FEATURE_OUT_OF_ORDER_EXEC,
+       BASE_HW_FEATURE_T7XX_PAIRING_RULES,
+       BASE_HW_FEATURE_TEST4_DATUM_MODE,
+       BASE_HW_FEATURE_FLUSH_REDUCTION,
+       BASE_HW_FEATURE_PROTECTED_MODE,
+       BASE_HW_FEATURE_COHERENCY_REG,
+       BASE_HW_FEATURE_END
+};
+
+static const enum base_hw_feature base_hw_features_tHEx[] = {
+       BASE_HW_FEATURE_JOBCHAIN_DISAMBIGUATION,
+       BASE_HW_FEATURE_PWRON_DURING_PWROFF_TRANS,
+       BASE_HW_FEATURE_XAFFINITY,
+       BASE_HW_FEATURE_WARPING,
+       BASE_HW_FEATURE_INTERPIPE_REG_ALIASING,
+       BASE_HW_FEATURE_32_BIT_UNIFORM_ADDRESS,
+       BASE_HW_FEATURE_ATTR_AUTO_TYPE_INFERRAL,
+       BASE_HW_FEATURE_BRNDOUT_CC,
+       BASE_HW_FEATURE_BRNDOUT_KILL,
+       BASE_HW_FEATURE_LD_ST_LEA_TEX,
+       BASE_HW_FEATURE_LD_ST_TILEBUFFER,
+       BASE_HW_FEATURE_LINEAR_FILTER_FLOAT,
+       BASE_HW_FEATURE_MRT,
+       BASE_HW_FEATURE_MSAA_16X,
+       BASE_HW_FEATURE_NEXT_INSTRUCTION_TYPE,
+       BASE_HW_FEATURE_OUT_OF_ORDER_EXEC,
+       BASE_HW_FEATURE_T7XX_PAIRING_RULES,
+       BASE_HW_FEATURE_TEST4_DATUM_MODE,
+       BASE_HW_FEATURE_FLUSH_REDUCTION,
+       BASE_HW_FEATURE_PROTECTED_MODE,
+       BASE_HW_FEATURE_PROTECTED_DEBUG_MODE,
+       BASE_HW_FEATURE_COHERENCY_REG,
+       BASE_HW_FEATURE_END
+};
+
+
 #endif /* _BASE_HWCONFIG_FEATURES_H_ */